Lines Matching refs:parent
346 * Convert the hardware index to the parent index by skipping
369 * Convert the parent index to the hardware index by adding
384 /* idx should always be a valid parent */
413 u8 parent;
416 parent = ingenic_clk_get_parent(hw);
418 if (!(clk_info->div.bypass_mask & BIT(parent))) {
464 u8 parent;
466 parent = ingenic_clk_get_parent(hw);
467 if (clk_info->div.bypass_mask & BIT(parent))
647 struct clk *clk, *parent;
696 /* pass rate changes to the parent clock */
712 parent = cgu->clocks.clks[clk_info->parents[i]];
714 __clk_get_name(parent);
723 parent = cgu->clocks.clks[clk_info->parents[0]];
724 parent_names[0] = __clk_get_name(parent);