Lines Matching defs:clks
258 static struct clk_hw **clks;
275 clks = clk_hw_data->hws;
277 clks[IMX93_CLK_DUMMY] = imx_clk_hw_fixed("dummy", 0);
278 clks[IMX93_CLK_24M] = imx_get_clk_hw_by_name(np, "osc_24m");
279 clks[IMX93_CLK_32K] = imx_get_clk_hw_by_name(np, "osc_32k");
280 clks[IMX93_CLK_EXT1] = imx_get_clk_hw_by_name(np, "clk_ext1");
282 clks[IMX93_CLK_SYS_PLL_PFD0] = imx_clk_hw_fixed("sys_pll_pfd0", 1000000000);
283 clks[IMX93_CLK_SYS_PLL_PFD0_DIV2] = imx_clk_hw_fixed_factor("sys_pll_pfd0_div2",
285 clks[IMX93_CLK_SYS_PLL_PFD1] = imx_clk_hw_fixed("sys_pll_pfd1", 800000000);
286 clks[IMX93_CLK_SYS_PLL_PFD1_DIV2] = imx_clk_hw_fixed_factor("sys_pll_pfd1_div2",
288 clks[IMX93_CLK_SYS_PLL_PFD2] = imx_clk_hw_fixed("sys_pll_pfd2", 625000000);
289 clks[IMX93_CLK_SYS_PLL_PFD2_DIV2] = imx_clk_hw_fixed_factor("sys_pll_pfd2_div2",
300 clks[IMX93_CLK_ARM_PLL] = imx_clk_fracn_gppll_integer("arm_pll", "osc_24m",
303 clks[IMX93_CLK_AUDIO_PLL] = imx_clk_fracn_gppll("audio_pll", "osc_24m", anatop_base + 0x1200,
305 clks[IMX93_CLK_VIDEO_PLL] = imx_clk_fracn_gppll("video_pll", "osc_24m", anatop_base + 0x1400,
317 clks[root->clk] = imx93_clk_composite_flags(root->name,
325 clks[ccgr->clk] = imx93_clk_gate(NULL, ccgr->name, ccgr->parent_name,
330 clks[IMX93_CLK_A55_SEL] = imx_clk_hw_mux2("a55_sel", base + 0x4820, 0, 1, a55_core_sels,
332 clks[IMX93_CLK_A55_CORE] = imx_clk_hw_cpu("a55_core", "a55_sel",
333 clks[IMX93_CLK_A55_SEL]->clk,
334 clks[IMX93_CLK_A55_SEL]->clk,
335 clks[IMX93_CLK_ARM_PLL]->clk,
336 clks[IMX93_CLK_A55_GATE]->clk);
338 imx_check_clk_hws(clks, IMX93_CLK_END);
342 dev_err(dev, "failed to register clks for i.MX93\n");
351 imx_unregister_hw_clocks(clks, IMX93_CLK_END);