Lines Matching refs:val
305 static u32 mmc_clk_delay(u32 val, u32 para, u32 off, u32 len)
311 val |= 1 << (off + i);
313 val &= ~(1 << (off + i));
317 return val;
324 u32 sam, drv, div, val;
359 val = readl_relaxed(mclk->clken_reg);
360 val &= ~(1 << mclk->clken_bit);
361 writel_relaxed(val, mclk->clken_reg);
363 val = readl_relaxed(mclk->sam_reg);
364 val = mmc_clk_delay(val, sam, mclk->sam_off, mclk->sam_bits);
365 writel_relaxed(val, mclk->sam_reg);
367 val = readl_relaxed(mclk->drv_reg);
368 val = mmc_clk_delay(val, drv, mclk->drv_off, mclk->drv_bits);
369 writel_relaxed(val, mclk->drv_reg);
371 val = readl_relaxed(mclk->div_reg);
372 val = mmc_clk_delay(val, div, mclk->div_off, mclk->div_bits);
373 writel_relaxed(val, mclk->div_reg);
375 val = readl_relaxed(mclk->clken_reg);
376 val |= 1 << mclk->clken_bit;
377 writel_relaxed(val, mclk->clken_reg);