Lines Matching defs:lpsc
109 static void davinci_lpsc_config(struct davinci_lpsc_clk *lpsc,
114 regmap_write_bits(lpsc->regmap, MDCTL(lpsc->md), MDSTAT_STATE_MASK,
117 if (lpsc->flags & LPSC_FORCE)
118 regmap_write_bits(lpsc->regmap, MDCTL(lpsc->md), MDCTL_FORCE,
121 regmap_read(lpsc->regmap, PDSTAT(lpsc->pd), &pdstat);
123 regmap_write_bits(lpsc->regmap, PDCTL(lpsc->pd), PDCTL_NEXT,
126 regmap_write(lpsc->regmap, PTCMD, BIT(lpsc->pd));
128 regmap_read_poll_timeout(lpsc->regmap, EPCPR, epcpr,
129 epcpr & BIT(lpsc->pd), 0, 0);
131 regmap_write_bits(lpsc->regmap, PDCTL(lpsc->pd), PDCTL_EPCGOOD,
134 regmap_write(lpsc->regmap, PTCMD, BIT(lpsc->pd));
137 regmap_read_poll_timeout(lpsc->regmap, PTSTAT, ptstat,
138 !(ptstat & BIT(lpsc->pd)), 0, 0);
140 regmap_read_poll_timeout(lpsc->regmap, MDSTAT(lpsc->md), mdstat,
147 struct davinci_lpsc_clk *lpsc = to_davinci_lpsc_clk(hw);
149 davinci_lpsc_config(lpsc, LPSC_STATE_ENABLE);
156 struct davinci_lpsc_clk *lpsc = to_davinci_lpsc_clk(hw);
158 davinci_lpsc_config(lpsc, LPSC_STATE_DISABLE);
163 struct davinci_lpsc_clk *lpsc = to_davinci_lpsc_clk(hw);
166 regmap_read(lpsc->regmap, MDSTAT(lpsc->md), &mdstat);
180 struct davinci_lpsc_clk *lpsc = to_davinci_lpsc_clk(pm_domain);
186 * to get the clock instead of using lpsc->hw.clk directly.
188 clk = clk_get_sys(best_dev_name(lpsc->dev), clk_hw_get_name(&lpsc->hw));
200 lpsc->genpd_clk = clk;
215 struct davinci_lpsc_clk *lpsc = to_davinci_lpsc_clk(pm_domain);
217 pm_clk_remove_clk(dev, lpsc->genpd_clk);
220 lpsc->genpd_clk = NULL;
239 struct davinci_lpsc_clk *lpsc;
243 lpsc = kzalloc(sizeof(*lpsc), GFP_KERNEL);
244 if (!lpsc)
259 lpsc->dev = dev;
260 lpsc->regmap = regmap;
261 lpsc->hw.init = &init;
262 lpsc->md = md;
263 lpsc->pd = pd;
264 lpsc->flags = flags;
266 ret = clk_hw_register(dev, &lpsc->hw);
268 kfree(lpsc);
274 return lpsc;
277 ret = clk_hw_register_clkdev(&lpsc->hw, name, best_dev_name(dev));
279 lpsc->pm_domain.name = devm_kasprintf(dev, GFP_KERNEL, "%s: %s",
281 lpsc->pm_domain.attach_dev = davinci_psc_genpd_attach_dev;
282 lpsc->pm_domain.detach_dev = davinci_psc_genpd_detach_dev;
283 lpsc->pm_domain.flags = GENPD_FLAG_PM_CLK;
285 is_on = davinci_lpsc_clk_is_enabled(&lpsc->hw);
286 pm_genpd_init(&lpsc->pm_domain, NULL, is_on);
288 return lpsc;
294 struct davinci_lpsc_clk *lpsc = to_davinci_lpsc_clk(hw);
297 if (IS_ERR_OR_NULL(lpsc))
301 regmap_write_bits(lpsc->regmap, MDCTL(lpsc->md), MDCTL_LRESET, mdctl);
335 struct davinci_lpsc_clk *lpsc;
343 lpsc = to_davinci_lpsc_clk(hw);
347 if (!(lpsc->flags & LPSC_LOCAL_RESET))
350 return lpsc->md;
407 struct davinci_lpsc_clk *lpsc;
409 lpsc = davinci_lpsc_clk_register(dev, info->name, info->parent,
412 if (IS_ERR(lpsc)) {
414 info->name, PTR_ERR(lpsc));
418 clks[info->md] = lpsc->hw.clk;
419 pm_domains[info->md] = &lpsc->pm_domain;