Lines Matching refs:param
438 struct xgene_dev_parameters param;
452 if (pclk->param.csr_reg) {
455 data = xgene_clk_read(pclk->param.csr_reg +
456 pclk->param.reg_clk_offset);
457 data |= pclk->param.reg_clk_mask;
458 xgene_clk_write(data, pclk->param.csr_reg +
459 pclk->param.reg_clk_offset);
462 pclk->param.reg_clk_offset, pclk->param.reg_clk_mask,
466 data = xgene_clk_read(pclk->param.csr_reg +
467 pclk->param.reg_csr_offset);
468 data &= ~pclk->param.reg_csr_mask;
469 xgene_clk_write(data, pclk->param.csr_reg +
470 pclk->param.reg_csr_offset);
473 pclk->param.reg_csr_offset, pclk->param.reg_csr_mask,
492 if (pclk->param.csr_reg) {
495 data = xgene_clk_read(pclk->param.csr_reg +
496 pclk->param.reg_csr_offset);
497 data |= pclk->param.reg_csr_mask;
498 xgene_clk_write(data, pclk->param.csr_reg +
499 pclk->param.reg_csr_offset);
502 data = xgene_clk_read(pclk->param.csr_reg +
503 pclk->param.reg_clk_offset);
504 data &= ~pclk->param.reg_clk_mask;
505 xgene_clk_write(data, pclk->param.csr_reg +
506 pclk->param.reg_clk_offset);
518 if (pclk->param.csr_reg) {
520 data = xgene_clk_read(pclk->param.csr_reg +
521 pclk->param.reg_clk_offset);
523 data & pclk->param.reg_clk_mask ? "enabled" :
529 return data & pclk->param.reg_clk_mask ? 1 : 0;
538 if (pclk->param.divider_reg) {
539 data = xgene_clk_read(pclk->param.divider_reg +
540 pclk->param.reg_divider_offset);
541 data >>= pclk->param.reg_divider_shift;
542 data &= (1 << pclk->param.reg_divider_width) - 1;
568 if (pclk->param.divider_reg) {
573 divider &= (1 << pclk->param.reg_divider_width) - 1;
574 divider <<= pclk->param.reg_divider_shift;
577 data = xgene_clk_read(pclk->param.divider_reg +
578 pclk->param.reg_divider_offset);
579 data &= ~(((1 << pclk->param.reg_divider_width) - 1)
580 << pclk->param.reg_divider_shift);
582 xgene_clk_write(data, pclk->param.divider_reg +
583 pclk->param.reg_divider_offset);
603 if (pclk->param.divider_reg) {
646 apmclk->param = *parameters;