Lines Matching refs:fod_1st_int
135 u32 fod_1st_int;
583 vc7->clk_fod[idx].fod_1st_int = (val & VC7_REG_FOD_1ST_INT_MASK);
598 * FOD dividers are part of an atomic group where fod_1st_int,
613 vc7->clk_fod[idx].fod_1st_int,
781 u32 fod_1st_int, u64 fod_frac)
790 divisor = ((u64)fod_1st_int * denom) + numer;
794 return div64_u64(parent_rate, fod_1st_int);
798 u32 fod_1st_int, u32 fod_2nd_int, u64 fod_frac)
802 fod_1st_stage_rate = vc7_calc_fod_1st_stage_rate(parent_rate, fod_1st_int, fod_frac);
816 u32 *fod_1st_int, u32 *fod_2nd_int, u64 *fod_frac)
821 vc7_calc_fod_1st_stage(rate, parent_rate, fod_1st_int, fod_frac);
822 first_stage_rate = vc7_calc_fod_1st_stage_rate(parent_rate, *fod_1st_int, *fod_frac);
841 vc7_calc_fod_1st_stage(parent_rate, rate * 2 * i, fod_1st_int, fod_frac);
843 *fod_1st_int,
853 if (*fod_1st_int < VC7_FOD_1ST_INT_MAX &&
892 fod_rate = vc7_calc_fod_2nd_stage_rate(parent_rate, fod->fod_1st_int,
895 pr_debug("%s - %s: fod_1st_int: %u, fod_2nd_int: %u, fod_frac: %llu\n",
897 fod->fod_1st_int, fod->fod_2nd_int, fod->fod_frac);
912 &fod->fod_1st_int, &fod->fod_2nd_int, &fod->fod_frac);
913 fod_rate = vc7_calc_fod_2nd_stage_rate(*parent_rate, fod->fod_1st_int,
916 pr_debug("%s - %s: fod_1st_int: %u, fod_2nd_int: %u, fod_frac: %llu\n",
918 fod->fod_1st_int, fod->fod_2nd_int, fod->fod_frac);
942 fod_rate = vc7_calc_fod_2nd_stage_rate(parent_rate, fod->fod_1st_int,
945 pr_debug("%s - %s: fod_1st_int: %u, fod_2nd_int: %u, fod_frac: %llu\n",
947 fod->fod_1st_int, fod->fod_2nd_int, fod->fod_frac);