Lines Matching refs:clk_apll
160 struct vc7_apll_data clk_apll;
531 vc7->clk_apll.xo_ib_h_div = (val32 & VC7_REG_XO_IB_H_DIV_MASK)
542 vc7->clk_apll.en_doubler = val32 & VC7_REG_APLL_EN_DOUBLER;
553 vc7->clk_apll.apll_fb_div_frac = val32 & VC7_REG_APLL_FB_DIV_FRAC_MASK;
564 vc7->clk_apll.apll_fb_div_int = val16 & VC7_REG_APLL_FB_DIV_INT_MASK;
740 if (vc7->clk_apll.xo_ib_h_div < 2)
743 refin_div = div64_u64(xtal_rate, vc7->clk_apll.xo_ib_h_div);
745 if (vc7->clk_apll.en_doubler)
749 apll_rate = (refin_div * vc7->clk_apll.apll_fb_div_int) +
750 ((refin_div * vc7->clk_apll.apll_fb_div_frac) >> VC7_APLL_DENOMINATOR_BITS);
753 __func__, vc7->clk_apll.xo_ib_h_div, vc7->clk_apll.apll_fb_div_int,
754 vc7->clk_apll.apll_fb_div_frac);
1132 vc7->clk_apll.clk = clk_register_fixed_rate(&client->dev, apll_name,
1136 if (IS_ERR(vc7->clk_apll.clk)) {
1137 return dev_err_probe(&client->dev, PTR_ERR(vc7->clk_apll.clk),
1147 parent_names[0] = __clk_get_name(vc7->clk_apll.clk);
1164 parent_names[0] = __clk_get_name(vc7->clk_apll.clk);
1234 clk_unregister_fixed_rate(vc7->clk_apll.clk);
1243 clk_unregister_fixed_rate(vc7->clk_apll.clk);