Lines Matching refs:reg
50 void __iomem *reg;
51 spinlock_t lock; /* lock for reg */
63 u16 reg; /* reg_index_shift */
327 writel(r0, clk->reg);
328 writel(r1, clk->reg + 4);
329 writel(r2, clk->reg + 8);
382 writel(0xffff0000 | pp[i], clk->reg + (i * 4));
440 u32 reg = readl(clk->reg);
443 if (reg & BIT(clk->bp_bit)) {
450 r = FIELD_GET(MASK_DIVR, readl(clk->reg + 4));
451 reg2 = readl(clk->reg + 8);
454 if (reg & MASK_SEL_FRA) {
456 u32 sdm = FIELD_GET(MASK_SDM_MOD, reg);
457 u32 ph = FIELD_GET(MASK_PH_SEL, reg);
458 u32 nfra = FIELD_GET(MASK_NFRA, reg);
473 u32 fbdiv = ((reg >> clk->div_shift) & ((1 << clk->div_width) - 1)) + 1;
486 u32 reg;
488 reg = BIT(clk->bp_bit + 16); /* HIWORD_MASK */
491 reg |= BIT(clk->bp_bit); /* bypass */
500 reg |= mask << 16;
501 reg |= ((fbdiv - 1) << clk->div_shift) & mask;
505 writel(reg, clk->reg);
515 writel(BIT(clk->pd_bit + 16) | BIT(clk->pd_bit), clk->reg);
524 writel(BIT(clk->pd_bit + 16), clk->reg);
531 return readl(clk->reg) & BIT(clk->pd_bit);
552 void __iomem *reg, int pd_bit, int bp_bit,
572 pll->reg = reg;
679 u32 j = sp_clk_gates[i].reg;