Lines Matching refs:clkout
63 struct si5351_hw_data *clkout;
802 * Si5351 clkout divider
929 __func__, clk_hw_get_name(&drvdata->clkout[num].hw),
947 if (pdata->clkout[hwdata->num].pll_reset)
1052 /* clkout freqency is 8kHz - 160MHz */
1134 /* powerup clkout */
1225 /* per clkout properties */
1235 dev_err(&client->dev, "invalid clkout %d\n", num);
1243 pdata->clkout[num].multisynth_src =
1247 pdata->clkout[num].multisynth_src =
1261 pdata->clkout[num].clkout_src =
1265 pdata->clkout[num].clkout_src =
1269 pdata->clkout[num].clkout_src =
1275 "invalid parent %d for clkout %d\n",
1279 pdata->clkout[num].clkout_src =
1284 "invalid parent %d for clkout %d\n",
1297 pdata->clkout[num].drive = val;
1301 "invalid drive strength %d for clkout %d\n",
1311 pdata->clkout[num].disable_state =
1315 pdata->clkout[num].disable_state =
1319 pdata->clkout[num].disable_state =
1323 pdata->clkout[num].disable_state =
1328 "invalid disable state %d for clkout %d\n",
1335 pdata->clkout[num].rate = val;
1337 pdata->clkout[num].pll_master =
1340 pdata->clkout[num].pll_reset =
1362 return &drvdata->clkout[idx].hw;
1455 pdata->clkout[n].multisynth_src);
1459 n, pdata->clkout[n].multisynth_src);
1464 pdata->clkout[n].clkout_src);
1467 "failed to reparent clkout %d to %d\n",
1468 n, pdata->clkout[n].clkout_src);
1473 pdata->clkout[n].drive);
1476 "failed set drive strength of clkout%d to %d\n",
1477 n, pdata->clkout[n].drive);
1482 pdata->clkout[n].disable_state);
1485 "failed set disable state of clkout%d to %d\n",
1486 n, pdata->clkout[n].disable_state);
1582 drvdata->clkout = devm_kcalloc(&client->dev, num_clocks,
1583 sizeof(*drvdata->clkout), GFP_KERNEL);
1586 if (WARN_ON(!drvdata->msynth || !drvdata->clkout)) {
1599 if (pdata->clkout[n].pll_master)
1620 drvdata->clkout[n].num = n;
1621 drvdata->clkout[n].drvdata = drvdata;
1622 drvdata->clkout[n].hw.init = &init;
1627 if (pdata->clkout[n].clkout_src == SI5351_CLKOUT_SRC_MSYNTH_N)
1632 &drvdata->clkout[n].hw);
1639 /* set initial clkout rate */
1640 if (pdata->clkout[n].rate != 0) {
1642 ret = clk_set_rate(drvdata->clkout[n].hw.clk,
1643 pdata->clkout[n].rate);