Lines Matching defs:BM1880_CLK_ENABLE0
24 #define BM1880_CLK_ENABLE0 0x00
222 BM1880_CLK_ENABLE0, 2, 0 },
224 BM1880_CLK_ENABLE0, 3, 0 },
230 BM1880_CLK_ENABLE0, 4, CLK_IS_CRITICAL },
232 BM1880_CLK_ENABLE0, 6, 0 },
234 BM1880_CLK_ENABLE0, 7, 0 },
236 BM1880_CLK_ENABLE0, 10, 0 },
238 BM1880_CLK_ENABLE0, 14, 0 },
240 BM1880_CLK_ENABLE0, 16, 0 },
242 BM1880_CLK_ENABLE0, 17, 0 },
245 BM1880_CLK_ENABLE0, 18, CLK_IGNORE_UNUSED },
247 BM1880_CLK_ENABLE0, 19, CLK_IGNORE_UNUSED },
249 BM1880_CLK_ENABLE0, 21, 0 },
251 BM1880_CLK_ENABLE0, 22, 0 },
257 BM1880_CLK_ENABLE0, 23, CLK_IS_CRITICAL },
259 BM1880_CLK_ENABLE0, 25, 0 },
261 BM1880_CLK_ENABLE0, 26, 0 },
263 BM1880_CLK_ENABLE0, 27, 0 },
265 BM1880_CLK_ENABLE0, 29, 0 },
267 BM1880_CLK_ENABLE0, 30, 0 },
404 BM1880_CLK_ENABLE0, 0, BM1880_CLK_SELECT, 0,
407 BM1880_CLK_ENABLE0, 1, BM1880_CLK_DIV0, 16, 5, 30,
410 BM1880_CLK_ENABLE0, 5, BM1880_CLK_DIV1, 16, 7, 60,
413 BM1880_CLK_ENABLE0, 8, BM1880_CLK_DIV2, 16, 5, 15,
416 BM1880_CLK_ENABLE0, 9, BM1880_CLK_DIV3, 16, 8, 120,
419 BM1880_CLK_ENABLE0, 11, BM1880_CLK_DIV4, 16, 5, 15,
422 BM1880_CLK_ENABLE0, 12, BM1880_CLK_DIV5, 16, 8, 120,
425 BM1880_CLK_ENABLE0, 13, BM1880_CLK_DIV6, 16, 5, 3,
428 BM1880_CLK_ENABLE0, 15, BM1880_CLK_DIV7, 16, 5, 3,
432 BM1880_CLK_ENABLE0, 20, BM1880_CLK_DIV8, 16, 16, 120,
435 BM1880_CLK_ENABLE0, 24, BM1880_CLK_DIV9, 16, 7, 61,
438 BM1880_CLK_ENABLE0, 28, BM1880_CLK_DIV10, 16, 5, 4,
441 BM1880_CLK_ENABLE0, 31, BM1880_CLK_DIV11, 16, 5, 30,