Lines Matching refs:base
35 * The REG_DIV register indirectly expresses a base integer divisor, roughly
37 * base divisor is adjusted on a cycle-by-cycle basis based on the state of a
68 void __iomem *base;
82 val = readl_relaxed(chan->base + REG_CTRL);
83 writel_relaxed(val | CTRL_ENABLE, chan->base + REG_CTRL);
91 val = readl_relaxed(chan->base + REG_CTRL);
92 writel_relaxed(val & ~CTRL_ENABLE, chan->base + REG_CTRL);
99 return (readl_relaxed(chan->base + REG_CTRL) & CTRL_ENABLE) != 0;
175 writel_relaxed(div, chan->base + REG_DIV);
176 writel_relaxed(inc1, chan->base + REG_INC1);
177 writel_relaxed(inc2, chan->base + REG_INC2);
180 writel_relaxed(1 << 31, chan->base + REG_ACCINIT);
196 readl_relaxed(chan->base + REG_DIV));
198 inc1 = readl_relaxed(chan->base + REG_INC1);
199 inc2 = readl_relaxed(chan->base + REG_INC2);
261 void __iomem *base;
267 base = devm_platform_get_and_ioremap_resource(pdev, 0, &res);
268 if (IS_ERR(base))
269 return PTR_ERR(base);
293 chan->base = base + NCO_CHANNEL_STRIDE * i;