Lines Matching defs:rate
21 unsigned long rate;
77 clk->rate = 0;
81 /* if clock divisor is not enabled, simply return parent rate */
84 clk->rate = parent_rate;
88 /* clock rate = parent rate / (high_div + 1) + (low_div + 1) */
94 clk->rate = parent_rate / (div_h + div_l);
95 pr_debug("%s: rate: %lu. parent rate: %lu div_h: %u div_l: %u\n",
96 __func__, clk->rate, parent_rate, div_h, div_l);
98 return clk->rate;
101 static long iproc_asiu_clk_round_rate(struct clk_hw *hw, unsigned long rate,
106 if (rate == 0 || *parent_rate == 0)
109 if (rate == *parent_rate)
112 div = DIV_ROUND_CLOSEST(*parent_rate, rate);
119 static int iproc_asiu_clk_set_rate(struct clk_hw *hw, unsigned long rate,
127 if (rate == 0 || parent_rate == 0)
130 /* simply disable the divisor if one wants the same rate as parent */
131 if (rate == parent_rate) {
138 div = DIV_ROUND_CLOSEST(parent_rate, rate);