Lines Matching defs:parent_hws
990 struct clk_hw *parent_hws[10];
1032 parent_hws[0] = main_rc_hw;
1033 parent_hws[1] = main_osc_hw;
1034 hw = at91_clk_register_sam9x5_main(regmap, "mainck", NULL, parent_hws, 2);
1102 parent_hws[0] = md_slck_hw;
1103 parent_hws[1] = td_slck_hw;
1104 parent_hws[2] = sama7g5_pmc->chws[PMC_MAIN];
1124 SAMA7G5_FILL_TABLE(&parent_hws[3], tmp_parent_hws,
1128 num_parents, NULL, parent_hws, mux_table,
1148 parent_hws[0] = md_slck_hw;
1149 parent_hws[1] = td_slck_hw;
1150 parent_hws[2] = sama7g5_pmc->chws[PMC_MAIN];
1151 parent_hws[3] = sama7g5_plls[PLL_ID_SYS][PLL_COMPID_DIV0].hw;
1152 parent_hws[4] = sama7g5_plls[PLL_ID_DDR][PLL_COMPID_DIV0].hw;
1153 parent_hws[5] = sama7g5_plls[PLL_ID_IMG][PLL_COMPID_DIV0].hw;
1154 parent_hws[6] = sama7g5_plls[PLL_ID_BAUD][PLL_COMPID_DIV0].hw;
1155 parent_hws[7] = sama7g5_plls[PLL_ID_AUDIO][PLL_COMPID_DIV0].hw;
1156 parent_hws[8] = sama7g5_plls[PLL_ID_ETH][PLL_COMPID_DIV0].hw;
1162 hw = at91_clk_register_programmable(regmap, name, NULL, parent_hws,
1198 parent_hws[0] = md_slck_hw;
1199 parent_hws[1] = td_slck_hw;
1200 parent_hws[2] = sama7g5_pmc->chws[PMC_MAIN];
1220 SAMA7G5_FILL_TABLE(&parent_hws[3], tmp_parent_hws,
1226 parent_hws, mux_table,