Lines Matching defs:pSettings
172 int dsp3780I_EnableDSP(DSP_3780I_CONFIG_SETTINGS * pSettings,
177 unsigned short usDspBaseIO = pSettings->usDspBaseIO;
199 "3780i::dsp3780I_EnableDSP entry pSettings->bDSPEnabled %x\n",
200 pSettings->bDSPEnabled);
203 if (!pSettings->bDSPEnabled) {
210 "3780i::dsp3780i_EnableDSP entry pSettings->bModemEnabled %x\n",
211 pSettings->bModemEnabled);
213 if (pSettings->bModemEnabled) {
215 rUartCfg1.IrqActiveLow = pSettings->bUartIrqActiveLow;
216 rUartCfg1.IrqPulse = pSettings->bUartIrqPulse;
218 (unsigned char) pIrqMap[pSettings->usUartIrq];
219 switch (pSettings->usUartBaseIO) {
237 rHBridgeCfg1.IrqActiveLow = pSettings->bDspIrqActiveLow;
238 rHBridgeCfg1.IrqPulse = pSettings->bDspIrqPulse;
239 rHBridgeCfg1.Irq = (unsigned char) pIrqMap[pSettings->usDspIrq];
245 rBusmasterCfg1.Dma = (unsigned char) pDmaMap[pSettings->usDspDma];
247 (unsigned char) pSettings->usNumTransfers;
248 rBusmasterCfg1.ReRequest = (unsigned char) pSettings->usReRequest;
249 rBusmasterCfg1.MEMCS16 = pSettings->bEnableMEMCS16;
251 (unsigned char) pSettings->usIsaMemCmdWidth;
255 rIsaProtCfg.GateIOCHRDY = pSettings->bGateIOCHRDY;
258 rPowerMgmtCfg.Enable = pSettings->bEnablePwrMgmt;
261 (unsigned char) pSettings->usHBusTimerLoadValue;
265 pSettings->bDisableLBusTimeout;
267 MKWORD(rChipReset) = ~pSettings->usChipletEnable;
270 rClockControl1.N_Divisor = pSettings->usN_Divisor;
271 rClockControl1.M_Multiplier = pSettings->usM_Multiplier;
274 rClockControl2.PllBypass = pSettings->bPllBypass;
323 if (pSettings->bModemEnabled) {
354 int dsp3780I_DisableDSP(DSP_3780I_CONFIG_SETTINGS * pSettings)
357 unsigned short usDspBaseIO = pSettings->usDspBaseIO;
384 int dsp3780I_Reset(DSP_3780I_CONFIG_SETTINGS * pSettings)
387 unsigned short usDspBaseIO = pSettings->usDspBaseIO;
420 (unsigned short) (~pSettings->usChipletEnable));
429 int dsp3780I_Run(DSP_3780I_CONFIG_SETTINGS * pSettings)
432 unsigned short usDspBaseIO = pSettings->usDspBaseIO;