Lines Matching defs:trng
58 struct exynos_trng_dev *trng;
63 trng = (struct exynos_trng_dev *)rng->priv;
65 writel_relaxed(max * 8, trng->mem + EXYNOS_TRNG_FIFO_CTRL);
66 val = readl_poll_timeout(trng->mem + EXYNOS_TRNG_FIFO_CTRL, val,
71 memcpy_fromio(data, trng->mem + EXYNOS_TRNG_FIFO_0, max);
78 struct exynos_trng_dev *trng = (struct exynos_trng_dev *)rng->priv;
82 sss_rate = clk_get_rate(trng->clk);
90 dev_err(trng->dev, "clock divider too large: %d", val);
94 writel_relaxed(val, trng->mem + EXYNOS_TRNG_CLKDIV);
98 writel_relaxed(val, trng->mem + EXYNOS_TRNG_CTRL);
104 writel_relaxed(0, trng->mem + EXYNOS_TRNG_POST_CTRL);
111 struct exynos_trng_dev *trng;
114 trng = devm_kzalloc(&pdev->dev, sizeof(*trng), GFP_KERNEL);
115 if (!trng)
118 trng->rng.name = devm_kstrdup(&pdev->dev, dev_name(&pdev->dev),
120 if (!trng->rng.name)
123 trng->rng.init = exynos_trng_init;
124 trng->rng.read = exynos_trng_do_read;
125 trng->rng.priv = (unsigned long) trng;
127 platform_set_drvdata(pdev, trng);
128 trng->dev = &pdev->dev;
130 trng->mem = devm_platform_ioremap_resource(pdev, 0);
131 if (IS_ERR(trng->mem))
132 return PTR_ERR(trng->mem);
141 trng->clk = devm_clk_get(&pdev->dev, "secss");
142 if (IS_ERR(trng->clk)) {
143 ret = PTR_ERR(trng->clk);
148 ret = clk_prepare_enable(trng->clk);
154 ret = devm_hwrng_register(&pdev->dev, &trng->rng);
165 clk_disable_unprepare(trng->clk);
178 struct exynos_trng_dev *trng = platform_get_drvdata(pdev);
180 clk_disable_unprepare(trng->clk);
213 .compatible = "samsung,exynos5250-trng",
221 .name = "exynos-trng",