Lines Matching defs:apbs
90 } apbs[MAX_BOARD];
148 if (apbs[boardno - 1].RamIO) {
150 boardno, physloc, boardno, apbs[boardno-1].PhysIO);
156 apbs[boardno].PhysIO = physloc;
157 apbs[boardno].RamIO = loc;
158 init_waitqueue_head(&apbs[boardno].FlagSleepSend);
159 spin_lock_init(&apbs[boardno].mutex);
174 if (!apbs[i].RamIO)
177 if (apbs[i].irq)
178 free_irq(apbs[i].irq, &dummy);
180 iounmap(apbs[i].RamIO);
234 apbs[boardno - 1].RamIO = NULL;
240 writeb(0x40, apbs[boardno - 1].RamIO + RAM_IT_FROM_PC);
242 apbs[boardno - 1].irq = dev->irq;
280 apbs[boardno - 1].RamIO = NULL;
283 apbs[boardno - 1].irq = irq;
286 apbs[boardno - 1].irq = 0;
312 if (!apbs[i].RamIO)
316 boardname[serial] = readb(apbs[i].RamIO + TYPE_CARD + serial);
323 (int)(readb(apbs[i].RamIO + VERS) >> 4),
324 (int)(readb(apbs[i].RamIO + VERS) & 0xF));
326 serial = (readb(apbs[i].RamIO + SERIAL_NUMBER) << 16) +
327 (readb(apbs[i].RamIO + SERIAL_NUMBER + 1) << 8) +
328 (readb(apbs[i].RamIO + SERIAL_NUMBER + 2) );
343 if (!apbs[i].RamIO)
345 if (apbs[i].irq)
346 free_irq(apbs[i].irq, &dummy);
347 iounmap(apbs[i].RamIO);
394 if (!apbs[IndexCard].RamIO)
423 spin_lock_irqsave(&apbs[IndexCard].mutex, flags);
426 if(readb(apbs[IndexCard].RamIO + DATA_FROM_PC_READY) > 2) {
427 Dummy = readb(apbs[IndexCard].RamIO + VERS);
428 spin_unlock_irqrestore(&apbs[IndexCard].mutex, flags);
430 IndexCard,(int)readb(apbs[IndexCard].RamIO + DATA_FROM_PC_READY));
437 add_wait_queue(&apbs[IndexCard].FlagSleepSend, &wait);
440 while (readb(apbs[IndexCard].RamIO + DATA_FROM_PC_READY) != 0) {
441 Dummy = readb(apbs[IndexCard].RamIO + VERS);
444 spin_unlock_irqrestore(&apbs[IndexCard].mutex, flags);
447 remove_wait_queue(&apbs[IndexCard].FlagSleepSend,
451 spin_lock_irqsave(&apbs[IndexCard].mutex, flags);
457 remove_wait_queue(&apbs[IndexCard].FlagSleepSend, &wait);
459 writeb(1, apbs[IndexCard].RamIO + DATA_FROM_PC_READY);
466 void __iomem *to = apbs[IndexCard].RamIO + RAM_FROM_PC;
473 writeb(0x20, apbs[IndexCard].RamIO + TIC_OWNER_FROM_PC);
474 writeb(0xff, apbs[IndexCard].RamIO + NUMCARD_OWNER_FROM_PC);
475 writeb(TicCard, apbs[IndexCard].RamIO + TIC_DES_FROM_PC);
476 writeb(NumCard, apbs[IndexCard].RamIO + NUMCARD_DES_FROM_PC);
477 writeb(2, apbs[IndexCard].RamIO + DATA_FROM_PC_READY);
478 writeb(1, apbs[IndexCard].RamIO + RAM_IT_FROM_PC);
479 Dummy = readb(apbs[IndexCard].RamIO + VERS);
480 spin_unlock_irqrestore(&apbs[IndexCard].mutex, flags);
487 void __iomem *from = apbs[IndexCard].RamIO + RAM_TO_PC;
493 st_loc->tic_owner_to_pc = readb(apbs[IndexCard].RamIO + TIC_OWNER_TO_PC);
494 st_loc->numcard_owner_to_pc = readb(apbs[IndexCard].RamIO + NUMCARD_OWNER_TO_PC);
503 writeb(1, apbs[IndexCard].RamIO + ACK_FROM_PC_READY);
504 writeb(1, apbs[IndexCard].RamIO + TYP_ACK_FROM_PC);
505 writeb(IndexCard+1, apbs[IndexCard].RamIO + NUMCARD_ACK_FROM_PC);
506 writeb(readb(apbs[IndexCard].RamIO + TIC_OWNER_TO_PC),
507 apbs[IndexCard].RamIO + TIC_ACK_FROM_PC);
508 writeb(2, apbs[IndexCard].RamIO + ACK_FROM_PC_READY);
509 writeb(0, apbs[IndexCard].RamIO + DATA_TO_PC_READY);
510 writeb(2, apbs[IndexCard].RamIO + RAM_IT_FROM_PC);
511 Dummy = readb(apbs[IndexCard].RamIO + VERS);
562 if (!apbs[i].RamIO)
564 spin_lock_irqsave(&apbs[i].mutex, flags);
566 tmp = readb(apbs[i].RamIO + DATA_TO_PC_READY);
575 spin_unlock_irqrestore(&apbs[i].mutex, flags);
588 Dummy = readb(apbs[i].RamIO + VERS);
590 spin_unlock_irqrestore(&apbs[i].mutex, flags);
595 i,(int)readb(apbs[i].RamIO + DATA_TO_PC_READY));
601 Dummy = readb(apbs[i].RamIO + VERS);
602 spin_unlock_irqrestore(&apbs[i].mutex, flags);
638 if (!apbs[i].RamIO)
641 spin_lock(&apbs[i].mutex);
644 if(readb(apbs[i].RamIO + RAM_IT_TO_PC) == 0) {
645 spin_unlock(&apbs[i].mutex);
651 writeb(0, apbs[i].RamIO + RAM_IT_TO_PC);
653 if (readb(apbs[i].RamIO + DATA_TO_PC_READY) > 2) {
655 i+1,(int)readb(apbs[i].RamIO + DATA_TO_PC_READY));
659 if((readb(apbs[i].RamIO + DATA_FROM_PC_READY) > 2) &&
660 (readb(apbs[i].RamIO + DATA_FROM_PC_READY) != 6)) {
663 i+1,(int)readb(apbs[i].RamIO + DATA_FROM_PC_READY));
667 if (readb(apbs[i].RamIO + DATA_TO_PC_READY) == 2) { /* mailbox sent by the card ? */
673 if (readb(apbs[i].RamIO + DATA_FROM_PC_READY) == 0) { /* ram i/o free for write by pc ? */
674 if (waitqueue_active(&apbs[i].FlagSleepSend)) { /* process sleep during read ? */
675 wake_up_interruptible(&apbs[i].FlagSleepSend);
678 Dummy = readb(apbs[i].RamIO + VERS);
680 if(readb(apbs[i].RamIO + RAM_IT_TO_PC)) {
682 spin_unlock(&apbs[i].mutex);
685 spin_unlock(&apbs[i].mutex);
724 if (cmd != 6 && !apbs[IndexCard].RamIO)
730 pmem = apbs[IndexCard].RamIO;
737 pmem = apbs[IndexCard].RamIO + CONF_END_TEST;
744 pmem = apbs[IndexCard].RamIO + VERS;
746 pmem = apbs[IndexCard].RamIO + TYPE_CARD;
750 (readb(apbs[IndexCard].RamIO + SERIAL_NUMBER) << 16) +
751 (readb(apbs[IndexCard].RamIO + SERIAL_NUMBER + 1) << 8) +
752 (readb(apbs[IndexCard].RamIO + SERIAL_NUMBER + 2) );
758 pmem = apbs[IndexCard].RamIO + CONF_END_TEST;
762 apbs[IndexCard].RamIO + DATA_FROM_PC_READY);
764 writeb(1, apbs[IndexCard].RamIO + RAM_IT_FROM_PC);
767 if (apbs[i].RamIO) {
768 byte_reset_it = readb(apbs[i].RamIO + RAM_IT_TO_PC);
773 pmem = apbs[IndexCard].RamIO + TIC_DES_FROM_PC;
777 pmem = apbs[IndexCard].RamIO + TIC_OWNER_TO_PC;
784 writeb(adgl->num_card, apbs[IndexCard].RamIO + NUMCARD_OWNER_TO_PC);
785 writeb(adgl->num_card, apbs[IndexCard].RamIO + NUMCARD_DES_FROM_PC);
786 writeb(adgl->num_card, apbs[IndexCard].RamIO + NUMCARD_ACK_FROM_PC);
787 writeb(4, apbs[IndexCard].RamIO + DATA_FROM_PC_READY);
788 writeb(1, apbs[IndexCard].RamIO + RAM_IT_FROM_PC);
799 if (!apbs[i].RamIO)
803 boardname[serial] = readb(apbs[i].RamIO + TYPE_CARD + serial);
808 (int)(readb(apbs[i].RamIO + VERS) >> 4),
809 (int)(readb(apbs[i].RamIO + VERS) & 0xF),
813 serial = (readb(apbs[i].RamIO + SERIAL_NUMBER) << 16) +
814 (readb(apbs[i].RamIO + SERIAL_NUMBER + 1) << 8) +
815 (readb(apbs[i].RamIO + SERIAL_NUMBER + 2) );
831 if (apbs[i].RamIO && waitqueue_active(&apbs[i].FlagSleepSend))
839 Dummy = readb(apbs[IndexCard].RamIO + VERS);