Lines Matching refs:ddata
58 struct sysc *ddata;
160 static void sysc_parse_dts_quirks(struct sysc *ddata, struct device_node *np,
162 static int sysc_reset(struct sysc *ddata);
164 static void sysc_write(struct sysc *ddata, int offset, u32 value)
166 if (ddata->cfg.quirks & SYSC_QUIRK_16BIT) {
167 writew_relaxed(value & 0xffff, ddata->module_va + offset);
170 if (ddata->offsets[SYSC_REVISION] >= 0 &&
171 offset == ddata->offsets[SYSC_REVISION]) {
174 writew_relaxed(hi, ddata->module_va + offset + 4);
180 writel_relaxed(value, ddata->module_va + offset);
183 static u32 sysc_read(struct sysc *ddata, int offset)
185 if (ddata->cfg.quirks & SYSC_QUIRK_16BIT) {
188 val = readw_relaxed(ddata->module_va + offset);
191 if (ddata->offsets[SYSC_REVISION] >= 0 &&
192 offset == ddata->offsets[SYSC_REVISION]) {
193 u16 tmp = readw_relaxed(ddata->module_va + offset + 4);
201 return readl_relaxed(ddata->module_va + offset);
204 static bool sysc_opt_clks_needed(struct sysc *ddata)
206 return !!(ddata->cfg.quirks & SYSC_QUIRK_OPT_CLKS_NEEDED);
209 static u32 sysc_read_revision(struct sysc *ddata)
211 int offset = ddata->offsets[SYSC_REVISION];
216 return sysc_read(ddata, offset);
219 static u32 sysc_read_sysconfig(struct sysc *ddata)
221 int offset = ddata->offsets[SYSC_SYSCONFIG];
226 return sysc_read(ddata, offset);
229 static u32 sysc_read_sysstatus(struct sysc *ddata)
231 int offset = ddata->offsets[SYSC_SYSSTATUS];
236 return sysc_read(ddata, offset);
239 static int sysc_poll_reset_sysstatus(struct sysc *ddata)
244 if (ddata->cfg.quirks & SYSS_QUIRK_RESETDONE_INVERTED)
247 syss_done = ddata->cfg.syss_mask;
250 error = readx_poll_timeout_atomic(sysc_read_sysstatus, ddata,
251 rstval, (rstval & ddata->cfg.syss_mask) ==
256 rstval = sysc_read_sysstatus(ddata);
257 if ((rstval & ddata->cfg.syss_mask) == syss_done)
267 static int sysc_poll_reset_sysconfig(struct sysc *ddata)
272 sysc_mask = BIT(ddata->cap->regbits->srst_shift);
275 error = readx_poll_timeout_atomic(sysc_read_sysconfig, ddata,
281 rstval = sysc_read_sysconfig(ddata);
293 static int sysc_wait_softreset(struct sysc *ddata)
297 if (ddata->cap->regbits->srst_shift < 0)
300 syss_offset = ddata->offsets[SYSC_SYSSTATUS];
303 error = sysc_poll_reset_sysstatus(ddata);
304 else if (ddata->cfg.quirks & SYSC_QUIRK_RESET_STATUS)
305 error = sysc_poll_reset_sysconfig(ddata);
310 static int sysc_add_named_clock_from_child(struct sysc *ddata,
314 struct device_node *np = ddata->dev->of_node;
337 clock = devm_get_clk_from_child(ddata->dev, child, name);
351 cl->dev_id = dev_name(ddata->dev);
360 static int sysc_init_ext_opt_clock(struct sysc *ddata, const char *name)
365 if (ddata->nr_clocks < SYSC_OPTFCK0)
368 index = ddata->nr_clocks;
375 error = sysc_add_named_clock_from_child(ddata, name, optfck_name);
379 ddata->clock_roles[index] = optfck_name;
380 ddata->nr_clocks++;
385 static int sysc_get_one_clock(struct sysc *ddata, const char *name)
396 if (!ddata->clocks[i]) {
404 dev_err(ddata->dev, "clock %s not added\n", name);
408 ddata->clocks[index] = devm_clk_get(ddata->dev, name);
409 if (IS_ERR(ddata->clocks[index])) {
410 dev_err(ddata->dev, "clock get error for %s: %li\n",
411 name, PTR_ERR(ddata->clocks[index]));
413 return PTR_ERR(ddata->clocks[index]);
416 error = clk_prepare(ddata->clocks[index]);
418 dev_err(ddata->dev, "clock prepare error for %s: %i\n",
427 static int sysc_get_clocks(struct sysc *ddata)
429 struct device_node *np = ddata->dev->of_node;
434 ddata->clock_roles = devm_kcalloc(ddata->dev,
436 sizeof(*ddata->clock_roles),
438 if (!ddata->clock_roles)
446 ddata->clock_roles[ddata->nr_clocks] = name;
447 ddata->nr_clocks++;
450 if (ddata->nr_clocks < 1)
453 if ((ddata->cfg.quirks & SYSC_QUIRK_EXT_OPT_CLOCK)) {
454 error = sysc_init_ext_opt_clock(ddata, NULL);
459 if (ddata->nr_clocks > SYSC_MAX_CLOCKS) {
460 dev_err(ddata->dev, "too many clocks for %pOF\n", np);
466 dev_err(ddata->dev, "max one fck and ick for %pOF\n", np);
473 ddata->nr_clocks++;
475 ddata->nr_clocks++;
477 ddata->clocks = devm_kcalloc(ddata->dev,
478 ddata->nr_clocks, sizeof(*ddata->clocks),
480 if (!ddata->clocks)
484 const char *name = ddata->clock_roles[i];
489 error = sysc_get_one_clock(ddata, name);
497 static int sysc_enable_main_clocks(struct sysc *ddata)
502 if (!ddata->clocks)
506 clock = ddata->clocks[i];
521 clock = ddata->clocks[i];
533 static void sysc_disable_main_clocks(struct sysc *ddata)
538 if (!ddata->clocks)
542 clock = ddata->clocks[i];
550 static int sysc_enable_opt_clocks(struct sysc *ddata)
555 if (!ddata->clocks || ddata->nr_clocks < SYSC_OPTFCK0 + 1)
559 clock = ddata->clocks[i];
574 clock = ddata->clocks[i];
584 static void sysc_disable_opt_clocks(struct sysc *ddata)
589 if (!ddata->clocks || ddata->nr_clocks < SYSC_OPTFCK0 + 1)
593 clock = ddata->clocks[i];
603 static void sysc_clkdm_deny_idle(struct sysc *ddata)
607 if (ddata->legacy_mode || (ddata->cfg.quirks & SYSC_QUIRK_CLKDM_NOAUTO))
610 pdata = dev_get_platdata(ddata->dev);
612 pdata->clkdm_deny_idle(ddata->dev, &ddata->cookie);
615 static void sysc_clkdm_allow_idle(struct sysc *ddata)
619 if (ddata->legacy_mode || (ddata->cfg.quirks & SYSC_QUIRK_CLKDM_NOAUTO))
622 pdata = dev_get_platdata(ddata->dev);
624 pdata->clkdm_allow_idle(ddata->dev, &ddata->cookie);
629 * @ddata: device driver data
633 static int sysc_init_resets(struct sysc *ddata)
635 ddata->rsts =
636 devm_reset_control_get_optional_shared(ddata->dev, "rstctrl");
638 return PTR_ERR_OR_ZERO(ddata->rsts);
643 * @ddata: device driver data
650 static int sysc_parse_and_check_child_range(struct sysc *ddata)
652 struct device_node *np = ddata->dev->of_node;
662 ddata->module_pa = range.cpu_addr;
663 ddata->module_size = range.size;
686 * @ddata: device driver data
692 static int sysc_defer_non_critical(struct sysc *ddata)
702 if (ddata->module_pa >= res->start &&
703 ddata->module_pa <= res->end) {
717 static void sysc_init_stdout_path(struct sysc *ddata)
748 static void sysc_check_quirk_stdout(struct sysc *ddata,
751 sysc_init_stdout_path(ddata);
755 ddata->cfg.quirks |= SYSC_QUIRK_NO_IDLE_ON_INIT |
761 * @ddata: device driver data
768 static void sysc_check_one_child(struct sysc *ddata,
775 dev_warn(ddata->dev, "really a child ti,hwmods property?");
777 sysc_check_quirk_stdout(ddata, np);
778 sysc_parse_dts_quirks(ddata, np, true);
781 static void sysc_check_children(struct sysc *ddata)
785 for_each_child_of_node(ddata->dev->of_node, child)
786 sysc_check_one_child(ddata, child);
795 static void sysc_check_quirk_16bit(struct sysc *ddata, struct resource *res)
798 ddata->cfg.quirks |= SYSC_QUIRK_16BIT | SYSC_QUIRK_USE_CLOCKACT;
803 * @ddata: device driver data
806 static int sysc_parse_one(struct sysc *ddata, enum sysc_registers reg)
821 res = platform_get_resource_byname(to_platform_device(ddata->dev),
824 ddata->offsets[reg] = -ENODEV;
829 ddata->offsets[reg] = res->start - ddata->module_pa;
831 sysc_check_quirk_16bit(ddata, res);
836 static int sysc_parse_registers(struct sysc *ddata)
841 error = sysc_parse_one(ddata, i);
851 * @ddata: device driver data
853 static int sysc_check_registers(struct sysc *ddata)
858 if (ddata->offsets[i] < 0)
861 if (ddata->offsets[i] > (ddata->module_size - 4)) {
862 dev_err(ddata->dev, "register outside module range");
868 if (ddata->offsets[j] < 0)
871 if (ddata->offsets[i] == ddata->offsets[j])
878 dev_err(ddata->dev, "overlapping registers: (%i/%i)",
889 * @ddata: device driver data
898 static int sysc_ioremap(struct sysc *ddata)
902 if (ddata->offsets[SYSC_REVISION] < 0 &&
903 ddata->offsets[SYSC_SYSCONFIG] < 0 &&
904 ddata->offsets[SYSC_SYSSTATUS] < 0) {
905 size = ddata->module_size;
907 size = max3(ddata->offsets[SYSC_REVISION],
908 ddata->offsets[SYSC_SYSCONFIG],
909 ddata->offsets[SYSC_SYSSTATUS]);
914 if ((size + sizeof(u32)) > ddata->module_size)
915 size = ddata->module_size;
918 ddata->module_va = devm_ioremap(ddata->dev,
919 ddata->module_pa,
921 if (!ddata->module_va)
929 * @ddata: device driver data
931 static int sysc_map_and_check_registers(struct sysc *ddata)
933 struct device_node *np = ddata->dev->of_node;
936 error = sysc_parse_and_check_child_range(ddata);
940 error = sysc_defer_non_critical(ddata);
944 sysc_check_children(ddata);
949 error = sysc_parse_registers(ddata);
953 error = sysc_ioremap(ddata);
957 error = sysc_check_registers(ddata);
967 * @ddata: device driver data
969 static int sysc_show_rev(char *bufp, struct sysc *ddata)
973 if (ddata->offsets[SYSC_REVISION] < 0)
976 len = sprintf(bufp, ":%08x", ddata->revision);
981 static int sysc_show_reg(struct sysc *ddata,
984 if (ddata->offsets[reg] < 0)
987 return sprintf(bufp, ":%x", ddata->offsets[reg]);
990 static int sysc_show_name(char *bufp, struct sysc *ddata)
992 if (!ddata->name)
995 return sprintf(bufp, ":%s", ddata->name);
1000 * @ddata: device driver data
1002 static void sysc_show_registers(struct sysc *ddata)
1009 bufp += sysc_show_reg(ddata, bufp, i);
1011 bufp += sysc_show_rev(bufp, ddata);
1012 bufp += sysc_show_name(bufp, ddata);
1014 dev_dbg(ddata->dev, "%llx:%x%s\n",
1015 ddata->module_pa, ddata->module_size,
1021 * @ddata: device driver data
1024 static void sysc_write_sysconfig(struct sysc *ddata, u32 value)
1026 if (ddata->module_unlock_quirk)
1027 ddata->module_unlock_quirk(ddata);
1029 sysc_write(ddata, ddata->offsets[SYSC_SYSCONFIG], value);
1031 if (ddata->module_lock_quirk)
1032 ddata->module_lock_quirk(ddata);
1041 struct sysc *ddata;
1046 ddata = dev_get_drvdata(dev);
1052 if (ddata->cfg.quirks & SYSC_QUIRK_OPT_CLKS_IN_RESET) {
1053 error = sysc_enable_opt_clocks(ddata);
1055 dev_err(ddata->dev,
1065 if (!(ddata->cfg.quirks & SYSC_MODULE_QUIRK_ENA_RESETDONE)) {
1066 error = sysc_wait_softreset(ddata);
1068 dev_warn(ddata->dev, "OCP softreset timed out\n");
1070 if (ddata->cfg.quirks & SYSC_QUIRK_OPT_CLKS_IN_RESET)
1071 sysc_disable_opt_clocks(ddata);
1078 if (ddata->offsets[SYSC_SYSCONFIG] == -ENODEV)
1081 regbits = ddata->cap->regbits;
1082 reg = sysc_read(ddata, ddata->offsets[SYSC_SYSCONFIG]);
1090 (ddata->cfg.quirks & SYSC_QUIRK_USE_CLOCKACT))
1094 idlemodes = ddata->cfg.sidlemodes;
1098 if (ddata->cfg.quirks & (SYSC_QUIRK_SWSUP_SIDLE |
1104 ddata->cfg.sysc_val & BIT(regbits->enwkup_shift))
1107 best_mode = fls(ddata->cfg.sidlemodes) - 1;
1115 ddata->cfg.sysc_val & BIT(regbits->enwkup_shift))
1121 sysc_write_sysconfig(ddata, reg);
1125 idlemodes = ddata->cfg.midlemodes;
1129 best_mode = fls(ddata->cfg.midlemodes) - 1;
1136 if (ddata->cfg.quirks & SYSC_QUIRK_SWSUP_MSTANDBY)
1141 sysc_write_sysconfig(ddata, reg);
1146 ddata->cfg.sysc_val & BIT(regbits->autoidle_shift)) {
1148 sysc_write_sysconfig(ddata, reg);
1155 ddata->sysconfig = sysc_read(ddata, ddata->offsets[SYSC_SYSCONFIG]);
1157 if (ddata->module_enable_quirk)
1158 ddata->module_enable_quirk(ddata);
1180 struct sysc *ddata;
1185 ddata = dev_get_drvdata(dev);
1186 if (ddata->offsets[SYSC_SYSCONFIG] == -ENODEV)
1189 if (ddata->module_disable_quirk)
1190 ddata->module_disable_quirk(ddata);
1192 regbits = ddata->cap->regbits;
1193 reg = sysc_read(ddata, ddata->offsets[SYSC_SYSCONFIG]);
1196 idlemodes = ddata->cfg.midlemodes;
1206 if (ddata->cfg.quirks & (SYSC_QUIRK_SWSUP_MSTANDBY) ||
1207 ddata->cfg.quirks & (SYSC_QUIRK_FORCE_MSTANDBY))
1212 sysc_write_sysconfig(ddata, reg);
1216 idlemodes = ddata->cfg.sidlemodes;
1222 if (ddata->cfg.quirks & SYSC_QUIRK_SWSUP_SIDLE) {
1233 if (ddata->cfg.quirks & SYSC_QUIRK_SWSUP_SIDLE_ACT) {
1236 ddata->cfg.sysc_val & BIT(regbits->enwkup_shift))
1243 ddata->cfg.sysc_val & BIT(regbits->autoidle_shift))
1245 sysc_write_sysconfig(ddata, reg);
1251 ddata->sysconfig = sysc_read(ddata, ddata->offsets[SYSC_SYSCONFIG]);
1257 struct sysc *ddata)
1262 pdata = dev_get_platdata(ddata->dev);
1269 error = pdata->idle_module(dev, &ddata->cookie);
1274 reset_control_assert(ddata->rsts);
1280 struct sysc *ddata)
1285 pdata = dev_get_platdata(ddata->dev);
1292 error = pdata->enable_module(dev, &ddata->cookie);
1297 reset_control_deassert(ddata->rsts);
1304 struct sysc *ddata;
1307 ddata = dev_get_drvdata(dev);
1309 if (!ddata->enabled)
1312 sysc_clkdm_deny_idle(ddata);
1314 if (ddata->legacy_mode) {
1315 error = sysc_runtime_suspend_legacy(dev, ddata);
1324 sysc_disable_main_clocks(ddata);
1326 if (sysc_opt_clks_needed(ddata))
1327 sysc_disable_opt_clocks(ddata);
1329 ddata->enabled = false;
1332 sysc_clkdm_allow_idle(ddata);
1334 reset_control_assert(ddata->rsts);
1341 struct sysc *ddata;
1344 ddata = dev_get_drvdata(dev);
1346 if (ddata->enabled)
1350 sysc_clkdm_deny_idle(ddata);
1352 if (sysc_opt_clks_needed(ddata)) {
1353 error = sysc_enable_opt_clocks(ddata);
1358 error = sysc_enable_main_clocks(ddata);
1362 reset_control_deassert(ddata->rsts);
1364 if (ddata->legacy_mode) {
1365 error = sysc_runtime_resume_legacy(dev, ddata);
1374 ddata->enabled = true;
1376 sysc_clkdm_allow_idle(ddata);
1381 sysc_disable_main_clocks(ddata);
1383 if (sysc_opt_clks_needed(ddata))
1384 sysc_disable_opt_clocks(ddata);
1386 sysc_clkdm_allow_idle(ddata);
1399 static int sysc_check_context(struct sysc *ddata)
1403 if (!ddata->enabled)
1406 reg = sysc_read(ddata, ddata->offsets[SYSC_SYSCONFIG]);
1407 if (reg == ddata->sysconfig)
1413 static int sysc_reinit_module(struct sysc *ddata, bool leave_enabled)
1415 struct device *dev = ddata->dev;
1418 if (ddata->enabled) {
1420 error = sysc_check_context(ddata);
1436 if (ddata->cfg.quirks & SYSC_QUIRK_RESET_ON_CTX_LOST) {
1437 error = sysc_reset(ddata);
1441 sysc_write_sysconfig(ddata, ddata->sysconfig);
1457 struct sysc *ddata;
1459 ddata = dev_get_drvdata(dev);
1461 if (ddata->cfg.quirks &
1465 if (!ddata->enabled)
1468 ddata->needs_resume = 1;
1475 struct sysc *ddata;
1478 ddata = dev_get_drvdata(dev);
1480 if (ddata->cfg.quirks &
1484 if (ddata->cfg.quirks & SYSC_QUIRK_REINIT_ON_RESUME) {
1485 error = sysc_reinit_module(ddata, ddata->needs_resume);
1488 } else if (ddata->needs_resume) {
1494 ddata->needs_resume = 0;
1709 static void sysc_init_early_quirks(struct sysc *ddata)
1720 if (q->base != ddata->module_pa)
1723 if (q->rev_offset != ddata->offsets[SYSC_REVISION])
1726 if (q->sysc_offset != ddata->offsets[SYSC_SYSCONFIG])
1729 if (q->syss_offset != ddata->offsets[SYSC_SYSSTATUS])
1732 ddata->name = q->name;
1733 ddata->cfg.quirks |= q->quirks;
1738 static void sysc_init_revision_quirks(struct sysc *ddata)
1746 if (q->base && q->base != ddata->module_pa)
1749 if (q->rev_offset != ddata->offsets[SYSC_REVISION])
1752 if (q->sysc_offset != ddata->offsets[SYSC_SYSCONFIG])
1755 if (q->syss_offset != ddata->offsets[SYSC_SYSSTATUS])
1758 if (q->revision == ddata->revision ||
1760 (ddata->revision & q->revision_mask)) {
1761 ddata->name = q->name;
1762 ddata->cfg.quirks |= q->quirks;
1772 static u32 sysc_quirk_dispc(struct sysc *ddata, int dispc_offset,
1803 devm_iounmap(ddata->dev, ddata->module_va);
1804 ddata->module_va = devm_ioremap(ddata->dev,
1805 ddata->module_pa,
1806 ddata->module_size);
1807 if (!ddata->module_va)
1811 val = sysc_read(ddata, dispc_offset + 0x40);
1823 sysc_write(ddata, dispc_offset + 0x40,
1830 val = sysc_read(ddata, dispc_offset + 0x238);
1835 sysc_write(ddata, dispc_offset + 0x238,
1842 val = sysc_read(ddata, dispc_offset + 0x848);
1847 sysc_write(ddata, dispc_offset + 0x848,
1854 static void sysc_pre_reset_quirk_dss(struct sysc *ddata)
1861 irq_mask = sysc_quirk_dispc(ddata, dispc_offset, false);
1866 sysc_write(ddata, dispc_offset + 0x18, irq_mask);
1869 val = sysc_quirk_dispc(ddata, dispc_offset, true);
1872 error = readl_poll_timeout(ddata->module_va + dispc_offset + 0x18,
1875 dev_warn(ddata->dev, "%s: timed out %08x !+ %08x\n",
1880 sysc_write(ddata, 0x44, 0);
1883 sysc_write(ddata, 0x48, 0);
1887 sysc_write(ddata, 0x40, 0);
1891 static void sysc_pre_reset_quirk_hdq1w(struct sysc *ddata)
1896 val = sysc_read(ddata, offset);
1898 sysc_write(ddata, offset, val);
1902 static void sysc_module_enable_quirk_aess(struct sysc *ddata)
1906 sysc_write(ddata, offset, 1);
1910 static void sysc_clk_quirk_i2c(struct sysc *ddata, bool enable)
1916 if ((ddata->revision & 0xffffff00) == 0x001f0000)
1922 val = sysc_read(ddata, offset);
1927 sysc_write(ddata, offset, val);
1930 static void sysc_pre_reset_quirk_i2c(struct sysc *ddata)
1932 sysc_clk_quirk_i2c(ddata, false);
1935 static void sysc_post_reset_quirk_i2c(struct sysc *ddata)
1937 sysc_clk_quirk_i2c(ddata, true);
1941 static void sysc_quirk_rtc(struct sysc *ddata, bool lock)
1954 error = readl_poll_timeout_atomic(ddata->module_va + 0x44, val,
1957 dev_warn(ddata->dev, "rtc busy timeout\n");
1959 sysc_write(ddata, 0x6c, kick0_val);
1960 sysc_write(ddata, 0x70, kick1_val);
1964 static void sysc_module_unlock_quirk_rtc(struct sysc *ddata)
1966 sysc_quirk_rtc(ddata, false);
1969 static void sysc_module_lock_quirk_rtc(struct sysc *ddata)
1971 sysc_quirk_rtc(ddata, true);
1975 static void sysc_module_enable_quirk_otg(struct sysc *ddata)
1979 sysc_write(ddata, offset, 0);
1982 static void sysc_module_disable_quirk_otg(struct sysc *ddata)
1987 sysc_write(ddata, offset, val);
1991 static void sysc_module_enable_quirk_sgx(struct sysc *ddata)
1996 sysc_write(ddata, offset, val);
2000 static void sysc_reset_done_quirk_wdt(struct sysc *ddata)
2008 sysc_write(ddata, spr, 0xaaaa);
2009 error = readl_poll_timeout(ddata->module_va + wps, val,
2013 dev_warn(ddata->dev, "wdt disable step1 failed\n");
2015 sysc_write(ddata, spr, 0x5555);
2016 error = readl_poll_timeout(ddata->module_va + wps, val,
2020 dev_warn(ddata->dev, "wdt disable step2 failed\n");
2024 static void sysc_module_disable_quirk_pruss(struct sysc *ddata)
2028 reg = sysc_read(ddata, ddata->offsets[SYSC_SYSCONFIG]);
2030 sysc_write(ddata, ddata->offsets[SYSC_SYSCONFIG], reg);
2033 static void sysc_init_module_quirks(struct sysc *ddata)
2035 if (ddata->legacy_mode || !ddata->name)
2038 if (ddata->cfg.quirks & SYSC_MODULE_QUIRK_HDQ1W) {
2039 ddata->pre_reset_quirk = sysc_pre_reset_quirk_hdq1w;
2045 if (ddata->cfg.quirks & SYSC_QUIRK_GPMC_DEBUG) {
2046 ddata->cfg.quirks |= SYSC_QUIRK_NO_RESET_ON_INIT;
2052 if (ddata->cfg.quirks & SYSC_MODULE_QUIRK_I2C) {
2053 ddata->pre_reset_quirk = sysc_pre_reset_quirk_i2c;
2054 ddata->post_reset_quirk = sysc_post_reset_quirk_i2c;
2059 if (ddata->cfg.quirks & SYSC_MODULE_QUIRK_AESS)
2060 ddata->module_enable_quirk = sysc_module_enable_quirk_aess;
2062 if (ddata->cfg.quirks & SYSC_MODULE_QUIRK_DSS_RESET)
2063 ddata->pre_reset_quirk = sysc_pre_reset_quirk_dss;
2065 if (ddata->cfg.quirks & SYSC_MODULE_QUIRK_RTC_UNLOCK) {
2066 ddata->module_unlock_quirk = sysc_module_unlock_quirk_rtc;
2067 ddata->module_lock_quirk = sysc_module_lock_quirk_rtc;
2072 if (ddata->cfg.quirks & SYSC_MODULE_QUIRK_OTG) {
2073 ddata->module_enable_quirk = sysc_module_enable_quirk_otg;
2074 ddata->module_disable_quirk = sysc_module_disable_quirk_otg;
2077 if (ddata->cfg.quirks & SYSC_MODULE_QUIRK_SGX)
2078 ddata->module_enable_quirk = sysc_module_enable_quirk_sgx;
2080 if (ddata->cfg.quirks & SYSC_MODULE_QUIRK_WDT) {
2081 ddata->reset_done_quirk = sysc_reset_done_quirk_wdt;
2082 ddata->module_disable_quirk = sysc_reset_done_quirk_wdt;
2085 if (ddata->cfg.quirks & SYSC_MODULE_QUIRK_PRUSS)
2086 ddata->module_disable_quirk = sysc_module_disable_quirk_pruss;
2089 static int sysc_clockdomain_init(struct sysc *ddata)
2091 struct ti_sysc_platform_data *pdata = dev_get_platdata(ddata->dev);
2098 switch (ddata->nr_clocks) {
2100 ick = ddata->clocks[SYSC_ICK];
2103 fck = ddata->clocks[SYSC_FCK];
2109 error = pdata->init_clockdomain(ddata->dev, fck, ick, &ddata->cookie);
2121 static int sysc_legacy_init(struct sysc *ddata)
2123 struct ti_sysc_platform_data *pdata = dev_get_platdata(ddata->dev);
2129 error = pdata->init_module(ddata->dev, ddata->mdata, &ddata->cookie);
2140 static int sysc_reset(struct sysc *ddata)
2145 sysc_offset = ddata->offsets[SYSC_SYSCONFIG];
2147 if (ddata->legacy_mode ||
2148 ddata->cap->regbits->srst_shift < 0 ||
2149 ddata->cfg.quirks & SYSC_QUIRK_NO_RESET_ON_INIT)
2152 sysc_mask = BIT(ddata->cap->regbits->srst_shift);
2154 if (ddata->pre_reset_quirk)
2155 ddata->pre_reset_quirk(ddata);
2158 sysc_val = sysc_read_sysconfig(ddata);
2160 sysc_write(ddata, sysc_offset, sysc_val);
2167 if (ddata->cfg.srst_udelay)
2168 fsleep(ddata->cfg.srst_udelay);
2175 sysc_val = sysc_read_sysconfig(ddata);
2178 if (ddata->post_reset_quirk)
2179 ddata->post_reset_quirk(ddata);
2181 error = sysc_wait_softreset(ddata);
2183 dev_warn(ddata->dev, "OCP softreset timed out\n");
2185 if (ddata->reset_done_quirk)
2186 ddata->reset_done_quirk(ddata);
2197 static int sysc_init_module(struct sysc *ddata)
2202 error = sysc_clockdomain_init(ddata);
2206 sysc_clkdm_deny_idle(ddata);
2212 error = sysc_enable_opt_clocks(ddata);
2216 error = sysc_enable_main_clocks(ddata);
2220 if (!(ddata->cfg.quirks & SYSC_QUIRK_NO_RESET_ON_INIT)) {
2221 error = reset_control_deassert(ddata->rsts);
2227 ddata->revision = sysc_read_revision(ddata);
2228 sysc_init_revision_quirks(ddata);
2229 sysc_init_module_quirks(ddata);
2231 if (ddata->legacy_mode) {
2232 error = sysc_legacy_init(ddata);
2237 if (!ddata->legacy_mode) {
2238 error = sysc_enable_module(ddata->dev);
2243 error = sysc_reset(ddata);
2245 dev_err(ddata->dev, "Reset failed with %d\n", error);
2247 if (error && !ddata->legacy_mode)
2248 sysc_disable_module(ddata->dev);
2252 sysc_disable_main_clocks(ddata);
2256 sysc_disable_opt_clocks(ddata);
2257 sysc_clkdm_allow_idle(ddata);
2261 !(ddata->cfg.quirks & SYSC_QUIRK_NO_RESET_ON_INIT))
2262 reset_control_assert(ddata->rsts);
2267 static int sysc_init_sysc_mask(struct sysc *ddata)
2269 struct device_node *np = ddata->dev->of_node;
2277 ddata->cfg.sysc_val = val & ddata->cap->sysc_mask;
2282 static int sysc_init_idlemode(struct sysc *ddata, u8 *idlemodes,
2285 struct device_node *np = ddata->dev->of_node;
2292 dev_err(ddata->dev, "invalid idlemode: %i\n", val);
2301 static int sysc_init_idlemodes(struct sysc *ddata)
2305 error = sysc_init_idlemode(ddata, &ddata->cfg.midlemodes,
2310 error = sysc_init_idlemode(ddata, &ddata->cfg.sidlemodes,
2325 static int sysc_init_syss_mask(struct sysc *ddata)
2327 struct device_node *np = ddata->dev->of_node;
2333 if ((ddata->cap->type == TI_SYSC_OMAP4 ||
2334 ddata->cap->type == TI_SYSC_OMAP4_TIMER) &&
2335 (ddata->cfg.sysc_val & SYSC_OMAP4_SOFTRESET))
2336 ddata->cfg.quirks |= SYSC_QUIRK_RESET_STATUS;
2341 if (!(val & 1) && (ddata->cfg.sysc_val & SYSC_OMAP4_SOFTRESET))
2342 ddata->cfg.quirks |= SYSC_QUIRK_RESET_STATUS;
2344 ddata->cfg.syss_mask = val;
2353 static int sysc_child_add_named_clock(struct sysc *ddata,
2370 clk = clk_get(ddata->dev, name);
2383 static int sysc_child_add_clocks(struct sysc *ddata,
2388 for (i = 0; i < ddata->nr_clocks; i++) {
2389 error = sysc_child_add_named_clock(ddata,
2391 ddata->clock_roles[i]);
2393 dev_err(ddata->dev, "could not add child clock %s: %i\n",
2394 ddata->clock_roles[i], error);
2418 struct sysc *ddata;
2421 ddata = sysc_child_to_parent(dev);
2427 if (!ddata->enabled)
2430 return sysc_runtime_suspend(ddata->dev);
2435 struct sysc *ddata;
2438 ddata = sysc_child_to_parent(dev);
2440 if (!ddata->enabled) {
2441 error = sysc_runtime_resume(ddata->dev);
2443 dev_err(ddata->dev,
2453 struct sysc *ddata;
2456 ddata = sysc_child_to_parent(dev);
2458 dev_dbg(ddata->dev, "%s %s\n", __func__,
2459 ddata->name ? ddata->name : "");
2478 error = sysc_runtime_suspend(ddata->dev);
2486 ddata->child_needs_resume = true;
2494 struct sysc *ddata;
2497 ddata = sysc_child_to_parent(dev);
2499 dev_dbg(ddata->dev, "%s %s\n", __func__,
2500 ddata->name ? ddata->name : "");
2502 if (ddata->child_needs_resume) {
2503 ddata->child_needs_resume = false;
2505 error = sysc_runtime_resume(ddata->dev);
2507 dev_err(ddata->dev,
2513 dev_err(ddata->dev,
2537 struct sysc *ddata;
2540 ddata = module->ddata;
2541 sysc_reinit_module(ddata, ddata->enabled);
2577 * @ddata: device data
2579 static void sysc_add_restored(struct sysc *ddata)
2587 restored_module->ddata = ddata;
2605 * @ddata: device driver data
2616 static void sysc_legacy_idle_quirk(struct sysc *ddata, struct device *child)
2618 if (ddata->cfg.quirks & SYSC_QUIRK_LEGACY_IDLE)
2626 struct sysc *ddata;
2629 ddata = sysc_child_to_parent(dev);
2630 if (!ddata)
2635 error = sysc_child_add_clocks(ddata, dev);
2638 sysc_legacy_idle_quirk(ddata, dev);
2666 static void sysc_parse_dts_quirks(struct sysc *ddata, struct device_node *np,
2679 ddata->cfg.quirks |= sysc_dts_quirks[i].mask;
2681 dev_warn(ddata->dev,
2688 static int sysc_init_dts_quirks(struct sysc *ddata)
2690 struct device_node *np = ddata->dev->of_node;
2694 ddata->legacy_mode = of_get_property(np, "ti,hwmods", NULL);
2696 sysc_parse_dts_quirks(ddata, np, false);
2700 dev_warn(ddata->dev, "bad ti,sysc-delay-us: %i\n",
2704 ddata->cfg.srst_udelay = (u8)val;
2710 static void sysc_unprepare(struct sysc *ddata)
2714 if (!ddata->clocks)
2718 if (!IS_ERR_OR_NULL(ddata->clocks[i]))
2719 clk_unprepare(ddata->clocks[i]);
2970 static int sysc_init_pdata(struct sysc *ddata)
2972 struct ti_sysc_platform_data *pdata = dev_get_platdata(ddata->dev);
2978 mdata = devm_kzalloc(ddata->dev, sizeof(*mdata), GFP_KERNEL);
2982 if (ddata->legacy_mode) {
2983 mdata->name = ddata->legacy_mode;
2984 mdata->module_pa = ddata->module_pa;
2985 mdata->module_size = ddata->module_size;
2986 mdata->offsets = ddata->offsets;
2988 mdata->cap = ddata->cap;
2989 mdata->cfg = &ddata->cfg;
2992 ddata->mdata = mdata;
2997 static int sysc_init_match(struct sysc *ddata)
3001 cap = of_device_get_match_data(ddata->dev);
3005 ddata->cap = cap;
3006 if (ddata->cap)
3007 ddata->cfg.quirks |= ddata->cap->mod_quirks;
3014 struct sysc *ddata;
3016 ddata = container_of(work, struct sysc, idle_work.work);
3024 if (ddata->cfg.quirks & (SYSC_QUIRK_NO_IDLE |
3026 sysc_disable_main_clocks(ddata);
3027 sysc_disable_opt_clocks(ddata);
3028 sysc_clkdm_allow_idle(ddata);
3032 if (ddata->cfg.quirks & SYSC_QUIRK_NO_IDLE)
3039 if (pm_runtime_active(ddata->dev))
3040 pm_runtime_put_sync(ddata->dev);
3107 * so ddata is only used for SoC type. This can be called from module_init
3110 static int sysc_init_static_data(struct sysc *ddata)
3129 pdata = dev_get_platdata(ddata->dev);
3217 static int sysc_check_disabled_devices(struct sysc *ddata)
3224 if (ddata->module_pa == disabled_module->base) {
3225 dev_dbg(ddata->dev, "module disabled for this SoC\n");
3240 static int sysc_check_active_timer(struct sysc *ddata)
3244 if (ddata->cap->type != TI_SYSC_OMAP2_TIMER &&
3245 ddata->cap->type != TI_SYSC_OMAP4_TIMER)
3260 if ((ddata->cfg.quirks & SYSC_QUIRK_NO_RESET_ON_INIT) &&
3261 (ddata->cfg.quirks & SYSC_QUIRK_NO_IDLE))
3275 struct sysc *ddata;
3278 ddata = devm_kzalloc(&pdev->dev, sizeof(*ddata), GFP_KERNEL);
3279 if (!ddata)
3282 ddata->offsets[SYSC_REVISION] = -ENODEV;
3283 ddata->offsets[SYSC_SYSCONFIG] = -ENODEV;
3284 ddata->offsets[SYSC_SYSSTATUS] = -ENODEV;
3285 ddata->dev = &pdev->dev;
3286 platform_set_drvdata(pdev, ddata);
3288 error = sysc_init_static_data(ddata);
3292 error = sysc_init_match(ddata);
3296 error = sysc_init_dts_quirks(ddata);
3300 error = sysc_map_and_check_registers(ddata);
3304 error = sysc_init_sysc_mask(ddata);
3308 error = sysc_init_idlemodes(ddata);
3312 error = sysc_init_syss_mask(ddata);
3316 error = sysc_init_pdata(ddata);
3320 sysc_init_early_quirks(ddata);
3322 error = sysc_check_disabled_devices(ddata);
3326 error = sysc_check_active_timer(ddata);
3328 ddata->reserved = true;
3332 error = sysc_get_clocks(ddata);
3336 error = sysc_init_resets(ddata);
3340 error = sysc_init_module(ddata);
3344 pm_runtime_enable(ddata->dev);
3345 error = pm_runtime_resume_and_get(ddata->dev);
3347 pm_runtime_disable(ddata->dev);
3352 if (!(ddata->cfg.quirks &
3354 sysc_disable_main_clocks(ddata);
3355 sysc_disable_opt_clocks(ddata);
3356 sysc_clkdm_allow_idle(ddata);
3359 if (!(ddata->cfg.quirks & SYSC_QUIRK_NO_RESET_ON_INIT))
3360 reset_control_assert(ddata->rsts);
3362 sysc_show_registers(ddata);
3364 ddata->dev->type = &sysc_device_type;
3366 if (!ddata->reserved) {
3367 error = of_platform_populate(ddata->dev->of_node,
3370 ddata->dev);
3375 INIT_DELAYED_WORK(&ddata->idle_work, ti_sysc_idle);
3378 if (ddata->cfg.quirks & (SYSC_QUIRK_NO_IDLE |
3381 schedule_delayed_work(&ddata->idle_work, 3000);
3386 if (ddata->cfg.quirks & SYSC_QUIRK_REINIT_ON_CTX_LOST)
3387 sysc_add_restored(ddata);
3395 sysc_unprepare(ddata);
3402 struct sysc *ddata = platform_get_drvdata(pdev);
3406 if (cancel_delayed_work_sync(&ddata->idle_work))
3407 ti_sysc_idle(&ddata->idle_work.work);
3409 error = pm_runtime_resume_and_get(ddata->dev);
3411 pm_runtime_disable(ddata->dev);
3420 if (!reset_control_status(ddata->rsts))
3421 reset_control_assert(ddata->rsts);
3424 sysc_unprepare(ddata);