Lines Matching defs:enabled
115 * @enabled: sysc runtime enabled status
147 unsigned int enabled:1;
1063 * the module reset quirk is enabled. Skip status check on enable.
1144 /* Autoidle bit must enabled separately if available */
1309 if (!ddata->enabled)
1329 ddata->enabled = false;
1346 if (ddata->enabled)
1374 ddata->enabled = true;
1394 * enabled devices.
1403 if (!ddata->enabled)
1418 if (ddata->enabled) {
1419 /* Nothing to do if enabled and context not lost */
1424 /* Disable target module if it is enabled */
1465 if (!ddata->enabled)
1769 * enabled DSS interrupts. Eventually we may be able to do this on
1810 /* DISP_CONTROL, shut down lcd and digit on disable if enabled */
1860 /* Get enabled outputs */
1890 /* 1-wire needs module's internal clocks enabled for reset */
2137 * Note that the caller must ensure the interconnect target module is enabled
2209 * Always enable clocks. The bootloader may or may not have enabled
2427 if (!ddata->enabled)
2440 if (!ddata->enabled) {
2541 sysc_reinit_module(ddata, ddata->enabled);
3021 * as they are enabled unconditionally during init without
3351 /* Balance use counts as PM runtime should have enabled these all */
3405 /* Device can still be enabled, see deferred idle quirk in probe */