Lines Matching refs:ctx
25 void (*reg_write)(struct regmap_mmio_context *ctx,
27 unsigned int (*reg_read)(struct regmap_mmio_context *ctx,
65 static void regmap_mmio_write8(struct regmap_mmio_context *ctx,
69 writeb(val, ctx->regs + reg);
72 static void regmap_mmio_write8_relaxed(struct regmap_mmio_context *ctx,
76 writeb_relaxed(val, ctx->regs + reg);
79 static void regmap_mmio_iowrite8(struct regmap_mmio_context *ctx,
82 iowrite8(val, ctx->regs + reg);
85 static void regmap_mmio_write16le(struct regmap_mmio_context *ctx,
89 writew(val, ctx->regs + reg);
92 static void regmap_mmio_write16le_relaxed(struct regmap_mmio_context *ctx,
96 writew_relaxed(val, ctx->regs + reg);
99 static void regmap_mmio_iowrite16le(struct regmap_mmio_context *ctx,
102 iowrite16(val, ctx->regs + reg);
105 static void regmap_mmio_write16be(struct regmap_mmio_context *ctx,
109 writew(swab16(val), ctx->regs + reg);
112 static void regmap_mmio_iowrite16be(struct regmap_mmio_context *ctx,
115 iowrite16be(val, ctx->regs + reg);
118 static void regmap_mmio_write32le(struct regmap_mmio_context *ctx,
122 writel(val, ctx->regs + reg);
125 static void regmap_mmio_write32le_relaxed(struct regmap_mmio_context *ctx,
129 writel_relaxed(val, ctx->regs + reg);
132 static void regmap_mmio_iowrite32le(struct regmap_mmio_context *ctx,
135 iowrite32(val, ctx->regs + reg);
138 static void regmap_mmio_write32be(struct regmap_mmio_context *ctx,
142 writel(swab32(val), ctx->regs + reg);
145 static void regmap_mmio_iowrite32be(struct regmap_mmio_context *ctx,
148 iowrite32be(val, ctx->regs + reg);
153 struct regmap_mmio_context *ctx = context;
156 if (!IS_ERR(ctx->clk)) {
157 ret = clk_enable(ctx->clk);
162 ctx->reg_write(ctx, reg, val);
164 if (!IS_ERR(ctx->clk))
165 clk_disable(ctx->clk);
173 struct regmap_mmio_context *ctx = context;
177 if (!IS_ERR(ctx->clk)) {
178 ret = clk_enable(ctx->clk);
189 if (ctx->big_endian && (ctx->val_bytes > 1)) {
190 switch (ctx->val_bytes) {
195 writew(swab16(valp[i]), ctx->regs + reg);
202 writel(swab32(valp[i]), ctx->regs + reg);
211 switch (ctx->val_bytes) {
213 writesb(ctx->regs + reg, (const u8 *)val, val_count);
216 writesw(ctx->regs + reg, (const u16 *)val, val_count);
219 writesl(ctx->regs + reg, (const u32 *)val, val_count);
227 if (!IS_ERR(ctx->clk))
228 clk_disable(ctx->clk);
233 static unsigned int regmap_mmio_read8(struct regmap_mmio_context *ctx,
236 return readb(ctx->regs + reg);
239 static unsigned int regmap_mmio_read8_relaxed(struct regmap_mmio_context *ctx,
242 return readb_relaxed(ctx->regs + reg);
245 static unsigned int regmap_mmio_ioread8(struct regmap_mmio_context *ctx,
248 return ioread8(ctx->regs + reg);
251 static unsigned int regmap_mmio_read16le(struct regmap_mmio_context *ctx,
254 return readw(ctx->regs + reg);
257 static unsigned int regmap_mmio_read16le_relaxed(struct regmap_mmio_context *ctx,
260 return readw_relaxed(ctx->regs + reg);
263 static unsigned int regmap_mmio_ioread16le(struct regmap_mmio_context *ctx,
266 return ioread16(ctx->regs + reg);
269 static unsigned int regmap_mmio_read16be(struct regmap_mmio_context *ctx,
272 return swab16(readw(ctx->regs + reg));
275 static unsigned int regmap_mmio_ioread16be(struct regmap_mmio_context *ctx,
278 return ioread16be(ctx->regs + reg);
281 static unsigned int regmap_mmio_read32le(struct regmap_mmio_context *ctx,
284 return readl(ctx->regs + reg);
287 static unsigned int regmap_mmio_read32le_relaxed(struct regmap_mmio_context *ctx,
290 return readl_relaxed(ctx->regs + reg);
293 static unsigned int regmap_mmio_ioread32le(struct regmap_mmio_context *ctx,
296 return ioread32(ctx->regs + reg);
299 static unsigned int regmap_mmio_read32be(struct regmap_mmio_context *ctx,
302 return swab32(readl(ctx->regs + reg));
305 static unsigned int regmap_mmio_ioread32be(struct regmap_mmio_context *ctx,
308 return ioread32be(ctx->regs + reg);
313 struct regmap_mmio_context *ctx = context;
316 if (!IS_ERR(ctx->clk)) {
317 ret = clk_enable(ctx->clk);
322 *val = ctx->reg_read(ctx, reg);
324 if (!IS_ERR(ctx->clk))
325 clk_disable(ctx->clk);
333 struct regmap_mmio_context *ctx = context;
336 if (!IS_ERR(ctx->clk)) {
337 ret = clk_enable(ctx->clk);
342 switch (ctx->val_bytes) {
344 readsb(ctx->regs + reg, (u8 *)val, val_count);
347 readsw(ctx->regs + reg, (u16 *)val, val_count);
350 readsl(ctx->regs + reg, (u32 *)val, val_count);
363 if (ctx->big_endian && (ctx->val_bytes > 1)) {
364 switch (ctx->val_bytes) {
378 if (!IS_ERR(ctx->clk))
379 clk_disable(ctx->clk);
387 struct regmap_mmio_context *ctx = context;
389 if (!IS_ERR(ctx->clk)) {
390 clk_unprepare(ctx->clk);
391 if (!ctx->attached_clk)
392 clk_put(ctx->clk);
412 struct regmap_mmio_context *ctx;
433 ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
434 if (!ctx)
437 ctx->regs = regs;
438 ctx->val_bytes = config->val_bits / 8;
439 ctx->clk = ERR_PTR(-ENODEV);
450 ctx->reg_read = regmap_mmio_ioread8;
451 ctx->reg_write = regmap_mmio_iowrite8;
453 ctx->reg_read = regmap_mmio_read8_relaxed;
454 ctx->reg_write = regmap_mmio_write8_relaxed;
456 ctx->reg_read = regmap_mmio_read8;
457 ctx->reg_write = regmap_mmio_write8;
462 ctx->reg_read = regmap_mmio_ioread16le;
463 ctx->reg_write = regmap_mmio_iowrite16le;
465 ctx->reg_read = regmap_mmio_read16le_relaxed;
466 ctx->reg_write = regmap_mmio_write16le_relaxed;
468 ctx->reg_read = regmap_mmio_read16le;
469 ctx->reg_write = regmap_mmio_write16le;
474 ctx->reg_read = regmap_mmio_ioread32le;
475 ctx->reg_write = regmap_mmio_iowrite32le;
477 ctx->reg_read = regmap_mmio_read32le_relaxed;
478 ctx->reg_write = regmap_mmio_write32le_relaxed;
480 ctx->reg_read = regmap_mmio_read32le;
481 ctx->reg_write = regmap_mmio_write32le;
493 ctx->big_endian = true;
497 ctx->reg_read = regmap_mmio_ioread8;
498 ctx->reg_write = regmap_mmio_iowrite8;
500 ctx->reg_read = regmap_mmio_read8;
501 ctx->reg_write = regmap_mmio_write8;
506 ctx->reg_read = regmap_mmio_ioread16be;
507 ctx->reg_write = regmap_mmio_iowrite16be;
509 ctx->reg_read = regmap_mmio_read16be;
510 ctx->reg_write = regmap_mmio_write16be;
515 ctx->reg_read = regmap_mmio_ioread32be;
516 ctx->reg_write = regmap_mmio_iowrite32be;
518 ctx->reg_read = regmap_mmio_read32be;
519 ctx->reg_write = regmap_mmio_write32be;
533 return ctx;
535 ctx->clk = clk_get(dev, clk_id);
536 if (IS_ERR(ctx->clk)) {
537 ret = PTR_ERR(ctx->clk);
541 ret = clk_prepare(ctx->clk);
543 clk_put(ctx->clk);
547 return ctx;
550 kfree(ctx);
561 struct regmap_mmio_context *ctx;
563 ctx = regmap_mmio_gen_context(dev, clk_id, regs, config);
564 if (IS_ERR(ctx))
565 return ERR_CAST(ctx);
567 return __regmap_init(dev, ®map_mmio, ctx, config,
579 struct regmap_mmio_context *ctx;
581 ctx = regmap_mmio_gen_context(dev, clk_id, regs, config);
582 if (IS_ERR(ctx))
583 return ERR_CAST(ctx);
585 return __devm_regmap_init(dev, ®map_mmio, ctx, config,
592 struct regmap_mmio_context *ctx = map->bus_context;
594 ctx->clk = clk;
595 ctx->attached_clk = true;
597 return clk_prepare(ctx->clk);
603 struct regmap_mmio_context *ctx = map->bus_context;
605 clk_unprepare(ctx->clk);
607 ctx->attached_clk = false;
608 ctx->clk = NULL;