Lines Matching defs:cache
3 // Register cache access API
55 dev_warn(map->dev, "No cache defaults, reading back from HW\n");
57 /* Bypass the cache access till data read from HW */
122 "No cache used with register defaults set!\n");
149 dev_err(map->dev, "Could not match cache type: %d\n",
160 map->cache = NULL;
179 /* Some devices such as PMICs don't have cache defaults,
181 * crafting the cache defaults by hand.
194 dev_dbg(map->dev, "Initializing %s cache\n",
222 dev_dbg(map->dev, "Destroying %s cache\n",
229 * regcache_read - Fetch the value of a given register from the cache.
260 * regcache_write - Set the value of a given register in the cache.
343 * regcache_sync - Sync the register cache with the hardware.
369 dev_dbg(map->dev, "Syncing %s cache\n",
403 * If we did any paging with cache bypassed and a cached
404 * paging register then the register and cache state might
412 /* If there's nothing in the cache there's nothing to sync */
435 * regcache_sync_region - Sync part of the register cache with the hardware.
464 dev_dbg(map->dev, "Syncing %s cache from %d-%d\n", name, min, max);
494 * regcache_drop_region - Discard part of the register cache
500 * Discard part of the register cache.
525 * regcache_cache_only - Put a register map into cache only mode
530 * When a register map is marked as cache only writes to the register
531 * map API will only update the register cache, they will not cause
554 * stored in the cache.
557 * the hardware state still matches the cache state, modulo any writes that
570 * regcache_cache_bypass - Put a register map into cache bypass mode
573 * @enable: flag if changes should not be written to the cache
575 * When a register map is marked with the cache bypass option, writes
577 * the cache directly. This is useful when syncing the cache back to
625 u8 *cache = base;
627 cache[idx] = val;
631 u16 *cache = base;
633 cache[idx] = val;
637 u32 *cache = base;
639 cache[idx] = val;
660 const u8 *cache = base;
662 return cache[idx];
665 const u16 *cache = base;
667 return cache[idx];
670 const u32 *cache = base;
672 return cache[idx];