Lines Matching refs:card
161 waitfor_idle(struct idt77252_dev *card)
171 read_sram(struct idt77252_dev *card, unsigned long addr)
176 spin_lock_irqsave(&card->cmd_lock, flags);
178 waitfor_idle(card);
180 spin_unlock_irqrestore(&card->cmd_lock, flags);
185 write_sram(struct idt77252_dev *card, unsigned long addr, u32 value)
190 (((addr > card->tst[0] + card->tst_size - 2) &&
191 (addr < card->tst[0] + card->tst_size)) ||
192 ((addr > card->tst[1] + card->tst_size - 2) &&
193 (addr < card->tst[1] + card->tst_size)))) {
195 card->name, addr, value);
198 spin_lock_irqsave(&card->cmd_lock, flags);
201 waitfor_idle(card);
202 spin_unlock_irqrestore(&card->cmd_lock, flags);
208 struct idt77252_dev *card = dev;
212 if (!card) {
217 spin_lock_irqsave(&card->cmd_lock, flags);
219 waitfor_idle(card);
221 spin_unlock_irqrestore(&card->cmd_lock, flags);
228 struct idt77252_dev *card = dev;
231 if (!card) {
236 spin_lock_irqsave(&card->cmd_lock, flags);
239 waitfor_idle(card);
240 spin_unlock_irqrestore(&card->cmd_lock, flags);
350 idt77252_read_gp(struct idt77252_dev *card)
362 idt77252_write_gp(struct idt77252_dev *card, u32 value)
372 spin_lock_irqsave(&card->cmd_lock, flags);
373 waitfor_idle(card);
375 spin_unlock_irqrestore(&card->cmd_lock, flags);
379 idt77252_eeprom_read_status(struct idt77252_dev *card)
385 gp = idt77252_read_gp(card) & ~(SAR_GP_EESCLK|SAR_GP_EECS|SAR_GP_EEDO);
388 idt77252_write_gp(card, gp | rdsrtab[i]);
391 idt77252_write_gp(card, gp | SAR_GP_EECS);
398 idt77252_write_gp(card, gp | clktab[j++]);
401 byte |= idt77252_read_gp(card) & SAR_GP_EEDI ? 1 : 0;
403 idt77252_write_gp(card, gp | clktab[j++]);
406 idt77252_write_gp(card, gp | SAR_GP_EECS);
413 idt77252_eeprom_read_byte(struct idt77252_dev *card, u8 offset)
419 gp = idt77252_read_gp(card) & ~(SAR_GP_EESCLK|SAR_GP_EECS|SAR_GP_EEDO);
422 idt77252_write_gp(card, gp | rdtab[i]);
425 idt77252_write_gp(card, gp | SAR_GP_EECS);
429 idt77252_write_gp(card, gp | clktab[j++] |
433 idt77252_write_gp(card, gp | clktab[j++] |
439 idt77252_write_gp(card, gp | SAR_GP_EECS);
446 idt77252_write_gp(card, gp | clktab[j++]);
449 byte |= idt77252_read_gp(card) & SAR_GP_EEDI ? 1 : 0;
451 idt77252_write_gp(card, gp | clktab[j++]);
454 idt77252_write_gp(card, gp | SAR_GP_EECS);
461 idt77252_eeprom_write_byte(struct idt77252_dev *card, u8 offset, u8 data)
466 gp = idt77252_read_gp(card) & ~(SAR_GP_EESCLK|SAR_GP_EECS|SAR_GP_EEDO);
469 idt77252_write_gp(card, gp | wrentab[i]);
472 idt77252_write_gp(card, gp | SAR_GP_EECS);
476 idt77252_write_gp(card, gp | wrtab[i]);
479 idt77252_write_gp(card, gp | SAR_GP_EECS);
483 idt77252_write_gp(card, gp | clktab[j++] |
487 idt77252_write_gp(card, gp | clktab[j++] |
493 idt77252_write_gp(card, gp | SAR_GP_EECS);
497 idt77252_write_gp(card, gp | clktab[j++] |
501 idt77252_write_gp(card, gp | clktab[j++] |
507 idt77252_write_gp(card, gp | SAR_GP_EECS);
512 idt77252_eeprom_init(struct idt77252_dev *card)
516 gp = idt77252_read_gp(card) & ~(SAR_GP_EESCLK|SAR_GP_EECS|SAR_GP_EEDO);
518 idt77252_write_gp(card, gp | SAR_GP_EECS | SAR_GP_EESCLK);
520 idt77252_write_gp(card, gp | SAR_GP_EECS);
522 idt77252_write_gp(card, gp | SAR_GP_EECS | SAR_GP_EESCLK);
524 idt77252_write_gp(card, gp | SAR_GP_EECS);
532 dump_tct(struct idt77252_dev *card, int index)
537 tct = (unsigned long) (card->tct_base + index * SAR_SRAM_TCT_SIZE);
539 printk("%s: TCT %x:", card->name, index);
541 printk(" %08x", read_sram(card, tct + i));
547 idt77252_tx_dump(struct idt77252_dev *card)
554 for (i = 0; i < card->tct_size; i++) {
555 vc = card->vcs[i];
568 printk("%s: Connection %d:\n", card->name, vc->index);
569 dump_tct(card, vc->index);
582 sb_pool_add(struct idt77252_dev *card, struct sk_buff *skb, int queue)
584 struct sb_pool *pool = &card->sbpool[queue];
602 sb_pool_remove(struct idt77252_dev *card, struct sk_buff *skb)
617 card->sbpool[queue].skb[index] = NULL;
621 sb_pool_skb(struct idt77252_dev *card, u32 handle)
633 return card->sbpool[queue].skb[index];
637 alloc_scq(struct idt77252_dev *card, int class)
644 scq->base = dma_alloc_coherent(&card->pcidev->dev, SCQ_SIZE,
668 free_scq(struct idt77252_dev *card, struct scq_info *scq)
673 dma_free_coherent(&card->pcidev->dev, SCQ_SIZE,
677 dma_unmap_single(&card->pcidev->dev, IDT77252_PRV_PADDR(skb),
688 dma_unmap_single(&card->pcidev->dev, IDT77252_PRV_PADDR(skb),
703 push_on_scq(struct idt77252_dev *card, struct vc_map *vc, struct sk_buff *skb)
710 TXPRINTK("%s: SCQ: next 0x%p\n", card->name, scq->next);
756 write_sram(card, scq->scd,
771 card->name, atomic_read(&scq->used),
772 read_sram(card, scq->scd + 1), scq->next);
779 card->name, vc->tx_vcc->vpi, vc->tx_vcc->vci);
781 idt77252_tx_dump(card);
791 drain_scq(struct idt77252_dev *card, struct vc_map *vc)
798 card->name, atomic_read(&scq->used), scq->next);
802 TXPRINTK("%s: freeing skb at %p.\n", card->name, skb);
804 dma_unmap_single(&card->pcidev->dev, IDT77252_PRV_PADDR(skb),
821 if (push_on_scq(card, vc, skb)) {
830 queue_skb(struct idt77252_dev *card, struct vc_map *vc,
841 printk("%s: invalid skb->len (%d)\n", card->name, skb->len);
846 card->name, skb->len);
853 IDT77252_PRV_PADDR(skb) = dma_map_single(&card->pcidev->dev, skb->data,
868 vc = card->vcs[0];
874 printk("%s: Trying to transmit on reserved VC\n", card->name);
909 printk("%s: Traffic type not supported.\n", card->name);
919 if (push_on_scq(card, vc, skb)) {
929 dma_unmap_single(&card->pcidev->dev, IDT77252_PRV_PADDR(skb),
935 get_free_scd(struct idt77252_dev *card, struct vc_map *vc)
939 for (i = 0; i < card->scd_size; i++) {
940 if (!card->scd2vc[i]) {
941 card->scd2vc[i] = vc;
943 return card->scd_base + i * SAR_SRAM_SCD_SIZE;
950 fill_scd(struct idt77252_dev *card, struct scq_info *scq, int class)
952 write_sram(card, scq->scd, scq->paddr);
953 write_sram(card, scq->scd + 1, 0x00000000);
954 write_sram(card, scq->scd + 2, 0xffffffff);
955 write_sram(card, scq->scd + 3, 0x00000000);
959 clear_scd(struct idt77252_dev *card, struct scq_info *scq, int class)
971 init_rsq(struct idt77252_dev *card)
975 card->rsq.base = dma_alloc_coherent(&card->pcidev->dev, RSQSIZE,
976 &card->rsq.paddr, GFP_KERNEL);
977 if (card->rsq.base == NULL) {
978 printk("%s: can't allocate RSQ.\n", card->name);
982 card->rsq.last = card->rsq.base + RSQ_NUM_ENTRIES - 1;
983 card->rsq.next = card->rsq.last;
984 for (rsqe = card->rsq.base; rsqe <= card->rsq.last; rsqe++)
987 writel((unsigned long) card->rsq.last - (unsigned long) card->rsq.base,
989 writel(card->rsq.paddr, SAR_REG_RSQB);
991 IPRINTK("%s: RSQ base at 0x%lx (0x%x).\n", card->name,
992 (unsigned long) card->rsq.base,
995 card->name,
1004 deinit_rsq(struct idt77252_dev *card)
1006 dma_free_coherent(&card->pcidev->dev, RSQSIZE,
1007 card->rsq.base, card->rsq.paddr);
1011 dequeue_rx(struct idt77252_dev *card, struct rsq_entry *rsqe)
1025 card->name);
1029 skb = sb_pool_skb(card, le32_to_cpu(rsqe->word_2));
1032 card->name, __func__,
1043 card->name, vpi, vci, skb, skb->data);
1045 if ((vpi >= (1 << card->vpibits)) || (vci != (vci & card->vcimask))) {
1047 card->name, vpi, vci);
1048 recycle_rx_skb(card, skb);
1052 vc = card->vcs[VPCI2VC(card, vpi, vci)];
1055 card->name, vpi, vci);
1056 recycle_rx_skb(card, skb);
1062 dma_sync_single_for_cpu(&card->pcidev->dev, IDT77252_PRV_PADDR(skb),
1076 card->name);
1082 card->name);
1104 recycle_rx_skb(card, skb);
1109 card->name, vcc->qos.aal);
1110 recycle_rx_skb(card, skb);
1129 RXPRINTK("%s: PDU has %d bytes.\n", card->name, len);
1134 card->name, len, rpp->len, readl(SAR_REG_CDC));
1135 recycle_rx_pool_skb(card, rpp);
1140 RXPRINTK("%s: AAL5 CRC error.\n", card->name);
1141 recycle_rx_pool_skb(card, rpp);
1151 card->name);
1152 recycle_rx_pool_skb(card, rpp);
1157 recycle_rx_pool_skb(card, rpp);
1164 recycle_rx_pool_skb(card, rpp);
1176 flush_rx_pool(card, rpp);
1179 recycle_rx_skb(card, skb);
1183 dma_unmap_single(&card->pcidev->dev, IDT77252_PRV_PADDR(skb),
1186 sb_pool_remove(card, skb);
1196 add_rx_skb(card, 3, SAR_FB_SIZE_3, 1);
1198 add_rx_skb(card, 2, SAR_FB_SIZE_2, 1);
1200 add_rx_skb(card, 1, SAR_FB_SIZE_1, 1);
1202 add_rx_skb(card, 0, SAR_FB_SIZE_0, 1);
1208 idt77252_rx(struct idt77252_dev *card)
1212 if (card->rsq.next == card->rsq.last)
1213 rsqe = card->rsq.base;
1215 rsqe = card->rsq.next + 1;
1218 RXPRINTK("%s: no entry in RSQ.\n", card->name);
1223 dequeue_rx(card, rsqe);
1225 card->rsq.next = rsqe;
1226 if (card->rsq.next == card->rsq.last)
1227 rsqe = card->rsq.base;
1229 rsqe = card->rsq.next + 1;
1232 writel((unsigned long) card->rsq.next - (unsigned long) card->rsq.base,
1237 idt77252_rx_raw(struct idt77252_dev *card)
1245 if (card->raw_cell_head == NULL) {
1246 u32 handle = le32_to_cpu(*(card->raw_cell_hnd + 1));
1247 card->raw_cell_head = sb_pool_skb(card, handle);
1250 queue = card->raw_cell_head;
1257 dma_sync_single_for_cpu(&card->pcidev->dev, IDT77252_PRV_PADDR(queue),
1275 card->name, (header >> 28) & 0x000f,
1286 if (vpi >= (1<<card->vpibits) || vci >= (1<<card->vcibits)) {
1288 card->name, vpi, vci);
1292 vc = card->vcs[VPCI2VC(card, vpi, vci)];
1295 card->name, vpi, vci);
1303 card->name, vpi, vci);
1310 card->name);
1317 card->name);
1344 next = sb_pool_skb(card, handle);
1345 recycle_rx_skb(card, queue);
1348 card->raw_cell_head = next;
1349 queue = card->raw_cell_head;
1350 dma_sync_single_for_cpu(&card->pcidev->dev,
1356 card->raw_cell_head = NULL;
1358 card->name);
1373 init_tsq(struct idt77252_dev *card)
1377 card->tsq.base = dma_alloc_coherent(&card->pcidev->dev, RSQSIZE,
1378 &card->tsq.paddr, GFP_KERNEL);
1379 if (card->tsq.base == NULL) {
1380 printk("%s: can't allocate TSQ.\n", card->name);
1384 card->tsq.last = card->tsq.base + TSQ_NUM_ENTRIES - 1;
1385 card->tsq.next = card->tsq.last;
1386 for (tsqe = card->tsq.base; tsqe <= card->tsq.last; tsqe++)
1389 writel(card->tsq.paddr, SAR_REG_TSQB);
1390 writel((unsigned long) card->tsq.next - (unsigned long) card->tsq.base,
1397 deinit_tsq(struct idt77252_dev *card)
1399 dma_free_coherent(&card->pcidev->dev, TSQSIZE,
1400 card->tsq.base, card->tsq.paddr);
1404 idt77252_tx(struct idt77252_dev *card)
1411 if (card->tsq.next == card->tsq.last)
1412 tsqe = card->tsq.base;
1414 tsqe = card->tsq.next + 1;
1417 card->tsq.base, card->tsq.next, card->tsq.last);
1435 TXPRINTK("%s: Timer RollOver detected.\n", card->name);
1445 card->name,
1451 vc = card->vcs[conn & 0x1fff];
1454 card->name, conn & 0x1fff);
1459 card->name, vc->index);
1468 vc = card->vcs[conn & 0x1fff];
1471 card->name,
1476 drain_scq(card, vc);
1486 if (vpi >= (1 << card->vpibits) ||
1487 vci >= (1 << card->vcibits)) {
1490 card->name, vpi, vci);
1494 vc = card->vcs[VPCI2VC(card, vpi, vci)];
1498 card->name, vpi, vci);
1502 drain_scq(card, vc);
1508 card->tsq.next = tsqe;
1509 if (card->tsq.next == card->tsq.last)
1510 tsqe = card->tsq.base;
1512 tsqe = card->tsq.next + 1;
1515 card->tsq.base, card->tsq.next, card->tsq.last);
1521 writel((unsigned long)card->tsq.next - (unsigned long)card->tsq.base,
1525 card->index, readl(SAR_REG_TSQH),
1526 readl(SAR_REG_TSQT), card->tsq.next);
1533 struct idt77252_dev *card = from_timer(card, t, tst_timer);
1539 spin_lock_irqsave(&card->tst_lock, flags);
1541 base = card->tst[card->tst_index];
1542 idle = card->tst[card->tst_index ^ 1];
1544 if (test_bit(TST_SWITCH_WAIT, &card->tst_state)) {
1545 jump = base + card->tst_size - 2;
1548 if ((pc ^ idle) & ~(card->tst_size - 1)) {
1549 mod_timer(&card->tst_timer, jiffies + 1);
1553 clear_bit(TST_SWITCH_WAIT, &card->tst_state);
1555 card->tst_index ^= 1;
1556 write_sram(card, jump, TSTE_OPC_JMP | (base << 2));
1558 base = card->tst[card->tst_index];
1559 idle = card->tst[card->tst_index ^ 1];
1561 for (e = 0; e < card->tst_size - 2; e++) {
1562 if (card->soft_tst[e].tste & TSTE_PUSH_IDLE) {
1563 write_sram(card, idle + e,
1564 card->soft_tst[e].tste & TSTE_MASK);
1565 card->soft_tst[e].tste &= ~(TSTE_PUSH_IDLE);
1570 if (test_and_clear_bit(TST_SWITCH_PENDING, &card->tst_state)) {
1572 for (e = 0; e < card->tst_size - 2; e++) {
1573 if (card->soft_tst[e].tste & TSTE_PUSH_ACTIVE) {
1574 write_sram(card, idle + e,
1575 card->soft_tst[e].tste & TSTE_MASK);
1576 card->soft_tst[e].tste &= ~(TSTE_PUSH_ACTIVE);
1577 card->soft_tst[e].tste |= TSTE_PUSH_IDLE;
1581 jump = base + card->tst_size - 2;
1583 write_sram(card, jump, TSTE_OPC_NULL);
1584 set_bit(TST_SWITCH_WAIT, &card->tst_state);
1586 mod_timer(&card->tst_timer, jiffies + 1);
1590 spin_unlock_irqrestore(&card->tst_lock, flags);
1594 __fill_tst(struct idt77252_dev *card, struct vc_map *vc,
1602 avail = card->tst_size - 2;
1604 if (card->soft_tst[e].vc == NULL)
1608 printk("%s: No free TST entries found\n", card->name);
1613 card->name, vc ? vc->index : -1, e);
1621 idle = card->tst[card->tst_index ^ 1];
1627 if ((cl >= avail) && (card->soft_tst[e].vc == NULL)) {
1629 card->soft_tst[e].vc = vc;
1631 card->soft_tst[e].vc = (void *)-1;
1633 card->soft_tst[e].tste = data;
1634 if (timer_pending(&card->tst_timer))
1635 card->soft_tst[e].tste |= TSTE_PUSH_ACTIVE;
1637 write_sram(card, idle + e, data);
1638 card->soft_tst[e].tste |= TSTE_PUSH_IDLE;
1641 cl -= card->tst_size;
1654 fill_tst(struct idt77252_dev *card, struct vc_map *vc, int n, unsigned int opc)
1659 spin_lock_irqsave(&card->tst_lock, flags);
1661 res = __fill_tst(card, vc, n, opc);
1663 set_bit(TST_SWITCH_PENDING, &card->tst_state);
1664 if (!timer_pending(&card->tst_timer))
1665 mod_timer(&card->tst_timer, jiffies + 1);
1667 spin_unlock_irqrestore(&card->tst_lock, flags);
1672 __clear_tst(struct idt77252_dev *card, struct vc_map *vc)
1677 idle = card->tst[card->tst_index ^ 1];
1679 for (e = 0; e < card->tst_size - 2; e++) {
1680 if (card->soft_tst[e].vc == vc) {
1681 card->soft_tst[e].vc = NULL;
1683 card->soft_tst[e].tste = TSTE_OPC_VAR;
1684 if (timer_pending(&card->tst_timer))
1685 card->soft_tst[e].tste |= TSTE_PUSH_ACTIVE;
1687 write_sram(card, idle + e, TSTE_OPC_VAR);
1688 card->soft_tst[e].tste |= TSTE_PUSH_IDLE;
1697 clear_tst(struct idt77252_dev *card, struct vc_map *vc)
1702 spin_lock_irqsave(&card->tst_lock, flags);
1704 res = __clear_tst(card, vc);
1706 set_bit(TST_SWITCH_PENDING, &card->tst_state);
1707 if (!timer_pending(&card->tst_timer))
1708 mod_timer(&card->tst_timer, jiffies + 1);
1710 spin_unlock_irqrestore(&card->tst_lock, flags);
1715 change_tst(struct idt77252_dev *card, struct vc_map *vc,
1721 spin_lock_irqsave(&card->tst_lock, flags);
1723 __clear_tst(card, vc);
1724 res = __fill_tst(card, vc, n, opc);
1726 set_bit(TST_SWITCH_PENDING, &card->tst_state);
1727 if (!timer_pending(&card->tst_timer))
1728 mod_timer(&card->tst_timer, jiffies + 1);
1730 spin_unlock_irqrestore(&card->tst_lock, flags);
1736 set_tct(struct idt77252_dev *card, struct vc_map *vc)
1740 tct = (unsigned long) (card->tct_base + vc->index * SAR_SRAM_TCT_SIZE);
1745 card->name, tct, vc->scq->scd);
1747 write_sram(card, tct + 0, TCT_CBR | vc->scq->scd);
1748 write_sram(card, tct + 1, 0);
1749 write_sram(card, tct + 2, 0);
1750 write_sram(card, tct + 3, 0);
1751 write_sram(card, tct + 4, 0);
1752 write_sram(card, tct + 5, 0);
1753 write_sram(card, tct + 6, 0);
1754 write_sram(card, tct + 7, 0);
1759 card->name, tct, vc->scq->scd);
1761 write_sram(card, tct + 0, TCT_UBR | vc->scq->scd);
1762 write_sram(card, tct + 1, 0);
1763 write_sram(card, tct + 2, TCT_TSIF);
1764 write_sram(card, tct + 3, TCT_HALT | TCT_IDLE);
1765 write_sram(card, tct + 4, 0);
1766 write_sram(card, tct + 5, vc->init_er);
1767 write_sram(card, tct + 6, 0);
1768 write_sram(card, tct + 7, TCT_FLAG_UBR);
1787 idt77252_fbq_full(struct idt77252_dev *card, int queue)
1793 push_rx_skb(struct idt77252_dev *card, struct sk_buff *skb, int queue)
1822 if (idt77252_fbq_full(card, queue))
1830 spin_lock_irqsave(&card->cmd_lock, flags);
1831 writel(handle, card->fbq[queue]);
1832 writel(addr, card->fbq[queue]);
1833 spin_unlock_irqrestore(&card->cmd_lock, flags);
1839 add_rx_skb(struct idt77252_dev *card, int queue,
1851 if (sb_pool_add(card, skb, queue)) {
1856 paddr = dma_map_single(&card->pcidev->dev, skb->data,
1861 if (push_rx_skb(card, skb, queue)) {
1870 dma_unmap_single(&card->pcidev->dev, IDT77252_PRV_PADDR(skb),
1874 card->sbpool[POOL_QUEUE(handle)].skb[POOL_INDEX(handle)] = NULL;
1882 recycle_rx_skb(struct idt77252_dev *card, struct sk_buff *skb)
1887 dma_sync_single_for_device(&card->pcidev->dev, IDT77252_PRV_PADDR(skb),
1891 err = push_rx_skb(card, skb, POOL_QUEUE(handle));
1893 dma_unmap_single(&card->pcidev->dev, IDT77252_PRV_PADDR(skb),
1896 sb_pool_remove(card, skb);
1902 flush_rx_pool(struct idt77252_dev *card, struct rx_pool *rpp)
1909 recycle_rx_pool_skb(struct idt77252_dev *card, struct rx_pool *rpp)
1914 recycle_rx_skb(card, skb);
1916 flush_rx_pool(card, rpp);
1941 struct idt77252_dev *card = dev->dev_data;
1946 printk("%s: NULL connection in send().\n", card->name);
1952 printk("%s: Trying to transmit on a non-tx VC.\n", card->name);
1964 printk("%s: Unsupported AAL: %d\n", card->name, vcc->qos.aal);
1971 printk("%s: No scatter-gather yet.\n", card->name);
1978 err = queue_skb(card, vc, skb, oam);
1997 struct idt77252_dev *card = dev->dev_data;
2002 printk("%s: Out of memory in send_oam().\n", card->name);
2059 idt77252_rate_logindex(struct idt77252_dev *card, int pcr)
2074 struct idt77252_dev *card = vc->card;
2094 lacr = idt77252_rate_logindex(card, cps);
2132 idt77252_init_cbr(struct idt77252_dev *card, struct vc_map *vc,
2142 card->name);
2147 tst_free = card->tst_free;
2155 TXPRINTK("%s: CBR target cell rate = %d\n", card->name, tcra);
2157 tmpl = (unsigned long) tcra * ((unsigned long) card->tst_size - 2);
2158 modl = tmpl % (unsigned long)card->utopia_pcr;
2160 tst_entries = (int) (tmpl / card->utopia_pcr);
2167 printk("%s: no CBR bandwidth free.\n", card->name);
2174 card->name);
2179 printk("%s: not enough CBR bandwidth free.\n", card->name);
2185 card->tst_free = tst_free - tst_entries;
2191 card->name, tst_used, tst_entries);
2192 change_tst(card, vc, tst_entries, TSTE_OPC_CBR);
2196 OPRINTK("%s: setting %d entries in TST.\n", card->name, tst_entries);
2197 fill_tst(card, vc, tst_entries, TSTE_OPC_CBR);
2202 idt77252_init_ubr(struct idt77252_dev *card, struct vc_map *vc,
2222 tcr = card->link_pcr;
2227 vc->init_er = idt77252_rate_logindex(card, tcr);
2238 idt77252_init_tx(struct idt77252_dev *card, struct vc_map *vc,
2261 vc->scq = alloc_scq(card, vc->class);
2263 printk("%s: can't get SCQ.\n", card->name);
2267 vc->scq->scd = get_free_scd(card, vc);
2269 printk("%s: no SCD available.\n", card->name);
2270 free_scq(card, vc->scq);
2274 fill_scd(card, vc->scq, vc->class);
2276 if (set_tct(card, vc)) {
2278 card->name, qos->txtp.traffic_class);
2280 card->scd2vc[vc->scd_index] = NULL;
2281 free_scq(card, vc->scq);
2287 error = idt77252_init_cbr(card, vc, vcc, qos);
2289 card->scd2vc[vc->scd_index] = NULL;
2290 free_scq(card, vc->scq);
2299 error = idt77252_init_ubr(card, vc, vcc, qos);
2301 card->scd2vc[vc->scd_index] = NULL;
2302 free_scq(card, vc->scq);
2316 idt77252_init_rx(struct idt77252_dev *card, struct vc_map *vc,
2332 flush_rx_pool(card, &vc->rcv.rx_pool);
2366 addr = card->rct_base + (vc->index << 2);
2368 OPRINTK("%s: writing RCT at 0x%lx\n", card->name, addr);
2369 write_sram(card, addr, rcte);
2371 spin_lock_irqsave(&card->cmd_lock, flags);
2373 waitfor_idle(card);
2374 spin_unlock_irqrestore(&card->cmd_lock, flags);
2383 struct idt77252_dev *card = dev->dev_data;
2394 if (vpi >= (1 << card->vpibits)) {
2395 printk("%s: unsupported VPI: %d\n", card->name, vpi);
2399 if (vci >= (1 << card->vcibits)) {
2400 printk("%s: unsupported VCI: %d\n", card->name, vci);
2406 mutex_lock(&card->mutex);
2408 OPRINTK("%s: opening vpi.vci: %d.%d\n", card->name, vpi, vci);
2416 printk("%s: Unsupported AAL: %d\n", card->name, vcc->qos.aal);
2417 mutex_unlock(&card->mutex);
2421 index = VPCI2VC(card, vpi, vci);
2422 if (!card->vcs[index]) {
2423 card->vcs[index] = kzalloc(sizeof(struct vc_map), GFP_KERNEL);
2424 if (!card->vcs[index]) {
2425 printk("%s: can't alloc vc in open()\n", card->name);
2426 mutex_unlock(&card->mutex);
2429 card->vcs[index]->card = card;
2430 card->vcs[index]->index = index;
2432 spin_lock_init(&card->vcs[index]->lock);
2434 vc = card->vcs[index];
2439 card->name, vc->index, vcc->vpi, vcc->vci,
2453 printk("%s: %s vci already in use.\n", card->name,
2455 mutex_unlock(&card->mutex);
2460 error = idt77252_init_tx(card, vc, vcc, &vcc->qos);
2462 mutex_unlock(&card->mutex);
2468 error = idt77252_init_rx(card, vc, vcc, &vcc->qos);
2470 mutex_unlock(&card->mutex);
2477 mutex_unlock(&card->mutex);
2485 struct idt77252_dev *card = dev->dev_data;
2491 mutex_lock(&card->mutex);
2494 card->name, vc->index, vcc->vpi, vcc->vci);
2508 addr = card->rct_base + vc->index * SAR_SRAM_RCT_SIZE;
2510 spin_lock_irqsave(&card->cmd_lock, flags);
2512 waitfor_idle(card);
2513 spin_unlock_irqrestore(&card->cmd_lock, flags);
2517 card->name);
2519 recycle_rx_pool_skb(card, &vc->rcv.rx_pool);
2544 card->name, atomic_read(&vc->scq->used));
2550 clear_scd(card, vc->scq, vc->class);
2553 clear_tst(card, vc);
2554 card->tst_free += vc->ntste;
2558 card->scd2vc[vc->scd_index] = NULL;
2559 free_scq(card, vc->scq);
2562 mutex_unlock(&card->mutex);
2569 struct idt77252_dev *card = dev->dev_data;
2573 mutex_lock(&card->mutex);
2577 error = idt77252_init_tx(card, vc, vcc, qos);
2583 error = idt77252_init_cbr(card, vc, vcc, qos);
2589 error = idt77252_init_ubr(card, vc, vcc, qos);
2609 error = idt77252_init_rx(card, vc, vcc, qos);
2619 mutex_unlock(&card->mutex);
2626 struct idt77252_dev *card = dev->dev_data;
2633 return sprintf(page, "TSIF: %lu\n", card->irqstat[15]);
2635 return sprintf(page, "TXICP: %lu\n", card->irqstat[14]);
2637 return sprintf(page, "TSQF: %lu\n", card->irqstat[12]);
2639 return sprintf(page, "TMROF: %lu\n", card->irqstat[11]);
2641 return sprintf(page, "PHYI: %lu\n", card->irqstat[10]);
2643 return sprintf(page, "FBQ3A: %lu\n", card->irqstat[8]);
2645 return sprintf(page, "FBQ2A: %lu\n", card->irqstat[7]);
2647 return sprintf(page, "RSQF: %lu\n", card->irqstat[6]);
2649 return sprintf(page, "EPDU: %lu\n", card->irqstat[5]);
2651 return sprintf(page, "RAWCF: %lu\n", card->irqstat[4]);
2653 return sprintf(page, "FBQ1A: %lu\n", card->irqstat[3]);
2655 return sprintf(page, "FBQ0A: %lu\n", card->irqstat[2]);
2657 return sprintf(page, "RSQAF: %lu\n", card->irqstat[1]);
2661 for (i = 0; i < card->tct_size; i++) {
2667 vc = card->vcs[i];
2681 tct = (unsigned long) (card->tct_base + i * SAR_SRAM_TCT_SIZE);
2684 p += sprintf(p, " %08x", read_sram(card, tct + i));
2698 idt77252_collect_stat(struct idt77252_dev *card)
2709 struct idt77252_dev *card = dev_id;
2716 if (test_and_set_bit(IDT77252_BIT_INTERRUPT, &card->flags)) {
2717 printk("%s: Re-entering irq_handler()\n", card->name);
2724 INTPRINTK("%s: TSIF\n", card->name);
2725 card->irqstat[15]++;
2726 idt77252_tx(card);
2729 INTPRINTK("%s: TXICP\n", card->name);
2730 card->irqstat[14]++;
2732 idt77252_tx_dump(card);
2736 INTPRINTK("%s: TSQF\n", card->name);
2737 card->irqstat[12]++;
2738 idt77252_tx(card);
2741 INTPRINTK("%s: TMROF\n", card->name);
2742 card->irqstat[11]++;
2743 idt77252_collect_stat(card);
2747 INTPRINTK("%s: EPDU\n", card->name);
2748 card->irqstat[5]++;
2749 idt77252_rx(card);
2752 INTPRINTK("%s: RSQAF\n", card->name);
2753 card->irqstat[1]++;
2754 idt77252_rx(card);
2757 INTPRINTK("%s: RSQF\n", card->name);
2758 card->irqstat[6]++;
2759 idt77252_rx(card);
2762 INTPRINTK("%s: RAWCF\n", card->name);
2763 card->irqstat[4]++;
2764 idt77252_rx_raw(card);
2768 INTPRINTK("%s: PHYI", card->name);
2769 card->irqstat[10]++;
2770 if (card->atmdev->phy && card->atmdev->phy->interrupt)
2771 card->atmdev->phy->interrupt(card->atmdev);
2779 INTPRINTK("%s: FBQA: %04x\n", card->name, stat);
2782 card->irqstat[2]++;
2784 card->irqstat[3]++;
2786 card->irqstat[7]++;
2788 card->irqstat[8]++;
2790 schedule_work(&card->tqueue);
2794 clear_bit(IDT77252_BIT_INTERRUPT, &card->flags);
2801 struct idt77252_dev *card =
2810 add_rx_skb(card, 0, SAR_FB_SIZE_0, 32);
2816 add_rx_skb(card, 1, SAR_FB_SIZE_1, 32);
2822 add_rx_skb(card, 2, SAR_FB_SIZE_2, 32);
2828 add_rx_skb(card, 3, SAR_FB_SIZE_3, 32);
2841 open_card_oam(struct idt77252_dev *card)
2850 for (vpi = 0; vpi < (1 << card->vpibits); vpi++) {
2852 index = VPCI2VC(card, vpi, vci);
2856 printk("%s: can't alloc vc\n", card->name);
2860 card->vcs[index] = vc;
2862 flush_rx_pool(card, &vc->rcv.rx_pool);
2869 addr = card->rct_base + (vc->index << 2);
2870 write_sram(card, addr, rcte);
2872 spin_lock_irqsave(&card->cmd_lock, flags);
2875 waitfor_idle(card);
2876 spin_unlock_irqrestore(&card->cmd_lock, flags);
2884 close_card_oam(struct idt77252_dev *card)
2892 for (vpi = 0; vpi < (1 << card->vpibits); vpi++) {
2894 index = VPCI2VC(card, vpi, vci);
2895 vc = card->vcs[index];
2897 addr = card->rct_base + vc->index * SAR_SRAM_RCT_SIZE;
2899 spin_lock_irqsave(&card->cmd_lock, flags);
2902 waitfor_idle(card);
2903 spin_unlock_irqrestore(&card->cmd_lock, flags);
2908 card->name);
2910 recycle_rx_pool_skb(card, &vc->rcv.rx_pool);
2918 open_card_ubr0(struct idt77252_dev *card)
2924 printk("%s: can't alloc vc\n", card->name);
2927 card->vcs[0] = vc;
2930 vc->scq = alloc_scq(card, vc->class);
2932 printk("%s: can't get SCQ.\n", card->name);
2933 kfree(card->vcs[0]);
2934 card->vcs[0] = NULL;
2938 card->scd2vc[0] = vc;
2940 vc->scq->scd = card->scd_base;
2942 fill_scd(card, vc->scq, vc->class);
2944 write_sram(card, card->tct_base + 0, TCT_UBR | card->scd_base);
2945 write_sram(card, card->tct_base + 1, 0);
2946 write_sram(card, card->tct_base + 2, 0);
2947 write_sram(card, card->tct_base + 3, 0);
2948 write_sram(card, card->tct_base + 4, 0);
2949 write_sram(card, card->tct_base + 5, 0);
2950 write_sram(card, card->tct_base + 6, 0);
2951 write_sram(card, card->tct_base + 7, TCT_FLAG_UBR);
2959 close_card_ubr0(struct idt77252_dev *card)
2961 struct vc_map *vc = card->vcs[0];
2963 free_scq(card, vc->scq);
2968 idt77252_dev_open(struct idt77252_dev *card)
2972 if (!test_bit(IDT77252_BIT_INIT, &card->flags)) {
2973 printk("%s: SAR not yet initialized.\n", card->name);
2997 if (open_card_oam(card)) {
2998 printk("%s: Error initializing OAM.\n", card->name);
3002 if (open_card_ubr0(card)) {
3003 printk("%s: Error initializing UBR0.\n", card->name);
3007 IPRINTK("%s: opened IDT77252 ABR SAR.\n", card->name);
3013 struct idt77252_dev *card = dev->dev_data;
3016 close_card_ubr0(card);
3017 close_card_oam(card);
3033 DIPRINTK("%s: closed IDT77252 ABR SAR.\n", card->name);
3045 deinit_card(struct idt77252_dev *card)
3050 if (!test_bit(IDT77252_BIT_INIT, &card->flags)) {
3051 printk("%s: SAR not yet initialized.\n", card->name);
3054 DIPRINTK("idt77252: deinitialize card %u\n", card->index);
3058 if (card->atmdev)
3059 atm_dev_deregister(card->atmdev);
3063 skb = card->sbpool[i].skb[j];
3065 dma_unmap_single(&card->pcidev->dev,
3070 card->sbpool[i].skb[j] = NULL;
3076 vfree(card->soft_tst);
3078 vfree(card->scd2vc);
3080 vfree(card->vcs);
3082 if (card->raw_cell_hnd) {
3083 dma_free_coherent(&card->pcidev->dev, 2 * sizeof(u32),
3084 card->raw_cell_hnd, card->raw_cell_paddr);
3087 if (card->rsq.base) {
3088 DIPRINTK("%s: Release RSQ ...\n", card->name);
3089 deinit_rsq(card);
3092 if (card->tsq.base) {
3093 DIPRINTK("%s: Release TSQ ...\n", card->name);
3094 deinit_tsq(card);
3098 free_irq(card->pcidev->irq, card);
3101 if (card->fbq[i])
3102 iounmap(card->fbq[i]);
3105 if (card->membase)
3106 iounmap(card->membase);
3108 clear_bit(IDT77252_BIT_INIT, &card->flags);
3109 DIPRINTK("%s: Card deinitialized.\n", card->name);
3113 static void init_sram(struct idt77252_dev *card)
3117 for (i = 0; i < card->sramsize; i += 4)
3118 write_sram(card, (i >> 2), 0);
3120 /* set SRAM layout for THIS card */
3121 if (card->sramsize == (512 * 1024)) {
3122 card->tct_base = SAR_SRAM_TCT_128_BASE;
3123 card->tct_size = (SAR_SRAM_TCT_128_TOP - card->tct_base + 1)
3125 card->rct_base = SAR_SRAM_RCT_128_BASE;
3126 card->rct_size = (SAR_SRAM_RCT_128_TOP - card->rct_base + 1)
3128 card->rt_base = SAR_SRAM_RT_128_BASE;
3129 card->scd_base = SAR_SRAM_SCD_128_BASE;
3130 card->scd_size = (SAR_SRAM_SCD_128_TOP - card->scd_base + 1)
3132 card->tst[0] = SAR_SRAM_TST1_128_BASE;
3133 card->tst[1] = SAR_SRAM_TST2_128_BASE;
3134 card->tst_size = SAR_SRAM_TST1_128_TOP - card->tst[0] + 1;
3135 card->abrst_base = SAR_SRAM_ABRSTD_128_BASE;
3136 card->abrst_size = SAR_ABRSTD_SIZE_8K;
3137 card->fifo_base = SAR_SRAM_FIFO_128_BASE;
3138 card->fifo_size = SAR_RXFD_SIZE_32K;
3140 card->tct_base = SAR_SRAM_TCT_32_BASE;
3141 card->tct_size = (SAR_SRAM_TCT_32_TOP - card->tct_base + 1)
3143 card->rct_base = SAR_SRAM_RCT_32_BASE;
3144 card->rct_size = (SAR_SRAM_RCT_32_TOP - card->rct_base + 1)
3146 card->rt_base = SAR_SRAM_RT_32_BASE;
3147 card->scd_base = SAR_SRAM_SCD_32_BASE;
3148 card->scd_size = (SAR_SRAM_SCD_32_TOP - card->scd_base + 1)
3150 card->tst[0] = SAR_SRAM_TST1_32_BASE;
3151 card->tst[1] = SAR_SRAM_TST2_32_BASE;
3152 card->tst_size = (SAR_SRAM_TST1_32_TOP - card->tst[0] + 1);
3153 card->abrst_base = SAR_SRAM_ABRSTD_32_BASE;
3154 card->abrst_size = SAR_ABRSTD_SIZE_1K;
3155 card->fifo_base = SAR_SRAM_FIFO_32_BASE;
3156 card->fifo_size = SAR_RXFD_SIZE_4K;
3160 for (i = 0; i < card->tct_size; i++) {
3161 write_sram(card, i * SAR_SRAM_TCT_SIZE + 0, 0);
3162 write_sram(card, i * SAR_SRAM_TCT_SIZE + 1, 0);
3163 write_sram(card, i * SAR_SRAM_TCT_SIZE + 2, 0);
3164 write_sram(card, i * SAR_SRAM_TCT_SIZE + 3, 0);
3165 write_sram(card, i * SAR_SRAM_TCT_SIZE + 4, 0);
3166 write_sram(card, i * SAR_SRAM_TCT_SIZE + 5, 0);
3167 write_sram(card, i * SAR_SRAM_TCT_SIZE + 6, 0);
3168 write_sram(card, i * SAR_SRAM_TCT_SIZE + 7, 0);
3172 for (i = 0; i < card->rct_size; i++) {
3173 write_sram(card, card->rct_base + i * SAR_SRAM_RCT_SIZE,
3175 write_sram(card, card->rct_base + i * SAR_SRAM_RCT_SIZE + 1,
3177 write_sram(card, card->rct_base + i * SAR_SRAM_RCT_SIZE + 2,
3179 write_sram(card, card->rct_base + i * SAR_SRAM_RCT_SIZE + 3,
3190 write_sram(card, card->rt_base + i, log_to_rate[i]);
3200 write_sram(card, card->rt_base + 256 + i, tmp);
3209 write_sram(card, card->rt_base + 512 + i, tmp);
3217 write_sram(card, card->rt_base + 640 + i, tmp);
3221 IPRINTK("%s: initialize rate table ...\n", card->name);
3222 writel(card->rt_base << 2, SAR_REG_RTBL);
3225 IPRINTK("%s: initialize TST ...\n", card->name);
3226 card->tst_free = card->tst_size - 2; /* last two are jumps */
3228 for (i = card->tst[0]; i < card->tst[0] + card->tst_size - 2; i++)
3229 write_sram(card, i, TSTE_OPC_VAR);
3230 write_sram(card, i++, TSTE_OPC_JMP | (card->tst[0] << 2));
3232 write_sram(card, i++, TSTE_OPC_JMP | (card->tst[1] << 2));
3234 for (i = card->tst[1]; i < card->tst[1] + card->tst_size - 2; i++)
3235 write_sram(card, i, TSTE_OPC_VAR);
3236 write_sram(card, i++, TSTE_OPC_JMP | (card->tst[1] << 2));
3238 write_sram(card, i++, TSTE_OPC_JMP | (card->tst[0] << 2));
3241 card->tst_index = 0;
3242 writel(card->tst[0] << 2, SAR_REG_TSTB);
3245 IPRINTK("%s: initialize ABRSTD ...\n", card->name);
3246 writel(card->abrst_size | (card->abrst_base << 2),
3249 IPRINTK("%s: initialize receive fifo ...\n", card->name);
3250 writel(card->fifo_size | (card->fifo_base << 2),
3253 IPRINTK("%s: SRAM initialization complete.\n", card->name);
3258 struct idt77252_dev *card = dev->dev_data;
3259 struct pci_dev *pcidev = card->pcidev;
3271 if (test_bit(IDT77252_BIT_INIT, &card->flags)) {
3281 IPRINTK("%s: Checking PCI retries.\n", card->name);
3283 printk("%s: can't read PCI retry timeout.\n", card->name);
3284 deinit_card(card);
3289 card->name, pci_byte);
3292 card->name);
3293 deinit_card(card);
3297 IPRINTK("%s: Checking PCI TRDY.\n", card->name);
3299 printk("%s: can't read PCI TRDY timeout.\n", card->name);
3300 deinit_card(card);
3305 card->name, pci_byte);
3307 printk("%s: can't set PCI TRDY timeout.\n", card->name);
3308 deinit_card(card);
3314 printk("%s: resetting timer overflow.\n", card->name);
3317 IPRINTK("%s: Request IRQ ... ", card->name);
3319 card->name, card) != 0) {
3320 printk("%s: can't allocate IRQ.\n", card->name);
3321 deinit_card(card);
3330 IPRINTK("%s: Initializing SRAM\n", card->name);
3341 if (card->sramsize == (512 * 1024))
3364 init_sram(card);
3370 if (0 != init_tsq(card)) {
3371 deinit_card(card);
3375 if (0 != init_rsq(card)) {
3376 deinit_card(card);
3380 card->vpibits = vpibits;
3381 if (card->sramsize == (512 * 1024)) {
3382 card->vcibits = 10 - card->vpibits;
3384 card->vcibits = 9 - card->vpibits;
3387 card->vcimask = 0;
3388 for (k = 0, i = 1; k < card->vcibits; k++) {
3389 card->vcimask |= i;
3393 IPRINTK("%s: Setting VPI/VCI mask to zero.\n", card->name);
3400 card->raw_cell_hnd = dma_alloc_coherent(&card->pcidev->dev,
3402 &card->raw_cell_paddr,
3404 if (!card->raw_cell_hnd) {
3405 printk("%s: memory allocation failure.\n", card->name);
3406 deinit_card(card);
3409 writel(card->raw_cell_paddr, SAR_REG_RAWHND);
3410 IPRINTK("%s: raw cell handle is at 0x%p.\n", card->name,
3411 card->raw_cell_hnd);
3413 size = sizeof(struct vc_map *) * card->tct_size;
3414 IPRINTK("%s: allocate %d byte for VC map.\n", card->name, size);
3415 card->vcs = vzalloc(size);
3416 if (!card->vcs) {
3417 printk("%s: memory allocation failure.\n", card->name);
3418 deinit_card(card);
3422 size = sizeof(struct vc_map *) * card->scd_size;
3424 card->name, size);
3425 card->scd2vc = vzalloc(size);
3426 if (!card->scd2vc) {
3427 printk("%s: memory allocation failure.\n", card->name);
3428 deinit_card(card);
3432 size = sizeof(struct tst_info) * (card->tst_size - 2);
3434 card->name, size);
3435 card->soft_tst = vmalloc(size);
3436 if (!card->soft_tst) {
3437 printk("%s: memory allocation failure.\n", card->name);
3438 deinit_card(card);
3441 for (i = 0; i < card->tst_size - 2; i++) {
3442 card->soft_tst[i].tste = TSTE_OPC_VAR;
3443 card->soft_tst[i].vc = NULL;
3447 printk("%s: No LT device defined.\n", card->name);
3448 deinit_card(card);
3452 printk("%s: LT had no IOCTL function defined.\n", card->name);
3453 deinit_card(card);
3470 card->link_pcr = (linkrate / 8 / 53);
3472 card->name, linkrate, card->link_pcr);
3475 card->utopia_pcr = card->link_pcr;
3477 card->utopia_pcr = (160000000 / 8 / 54);
3481 if (card->utopia_pcr > card->link_pcr)
3482 rsvdcr = card->utopia_pcr - card->link_pcr;
3484 tmpl = (unsigned long) rsvdcr * ((unsigned long) card->tst_size - 2);
3485 modl = tmpl % (unsigned long)card->utopia_pcr;
3486 tst_entries = (int) (tmpl / (unsigned long)card->utopia_pcr);
3489 card->tst_free -= tst_entries;
3490 fill_tst(card, NULL, tst_entries, TSTE_OPC_NULL);
3493 idt77252_eeprom_init(card);
3494 printk("%s: EEPROM: %02x:", card->name,
3495 idt77252_eeprom_read_status(card));
3499 idt77252_eeprom_read_byte(card, i)
3508 sprintf(tname, "eth%d", card->index);
3511 memcpy(card->atmdev->esi, tmp->dev_addr, 6);
3513 printk("%s: ESI %pM\n", card->name, card->atmdev->esi);
3522 set_bit(IDT77252_BIT_INIT, &card->flags);
3524 XPRINTK("%s: IDT77252 ABR SAR initialization complete.\n", card->name);
3536 static int idt77252_preset(struct idt77252_dev *card)
3545 card->name);
3546 if (pci_read_config_word(card->pcidev, PCI_COMMAND, &pci_command)) {
3547 printk("%s: can't read PCI_COMMAND.\n", card->name);
3548 deinit_card(card);
3553 card->name, pci_command);
3554 deinit_card(card);
3558 if (pci_write_config_word(card->pcidev, PCI_COMMAND, pci_command)) {
3559 printk("%s: can't write PCI_COMMAND.\n", card->name);
3560 deinit_card(card);
3572 IPRINTK("%s: Software resetted.\n", card->name);
3577 static unsigned long probe_sram(struct idt77252_dev *card)
3605 struct idt77252_dev *card;
3620 card = kzalloc(sizeof(struct idt77252_dev), GFP_KERNEL);
3621 if (!card) {
3626 card->revision = pcidev->revision;
3627 card->index = index;
3628 card->pcidev = pcidev;
3629 sprintf(card->name, "idt77252-%d", card->index);
3631 INIT_WORK(&card->tqueue, idt77252_softint);
3636 mutex_init(&card->mutex);
3637 spin_lock_init(&card->cmd_lock);
3638 spin_lock_init(&card->tst_lock);
3640 timer_setup(&card->tst_timer, tst_timer, 0);
3643 card->membase = ioremap(membase, 1024);
3644 if (!card->membase) {
3645 printk("%s: can't ioremap() membase\n", card->name);
3650 if (idt77252_preset(card)) {
3651 printk("%s: preset failed\n", card->name);
3659 printk("%s: can't register atm device\n", card->name);
3663 dev->dev_data = card;
3664 card->atmdev = dev;
3669 printk("%s: can't init SUNI\n", card->name);
3675 card->sramsize = probe_sram(card);
3678 card->fbq[i] = ioremap(srambase | 0x200000 | (i << 18), 4);
3679 if (!card->fbq[i]) {
3680 printk("%s: can't ioremap() FBQ%d\n", card->name, i);
3687 card->name, ((card->revision > 1) && (card->revision < 25)) ?
3688 'A' + card->revision - 1 : '?', membase, srambase,
3689 card->sramsize / 1024);
3692 printk("%s: init_card failed\n", card->name);
3697 dev->ci_range.vpi_bits = card->vpibits;
3698 dev->ci_range.vci_bits = card->vcibits;
3699 dev->link_rate = card->link_pcr;
3704 if (idt77252_dev_open(card)) {
3705 printk("%s: dev_open failed\n", card->name);
3710 *last = card;
3711 last = &card->next;
3721 deinit_card(card);
3724 iounmap(card->membase);
3727 kfree(card);
3759 struct idt77252_dev *card;
3765 card = idt77252_chain;
3766 dev = card->atmdev;
3767 idt77252_chain = card->next;
3768 timer_shutdown_sync(&card->tst_timer);
3772 deinit_card(card);
3773 pci_disable_device(card->pcidev);
3774 kfree(card);