Lines Matching refs:tmp8
537 u8 tmp8;
539 pci_read_config_byte(pdev, 0x52, &tmp8);
540 pci_write_config_byte(pdev, 0x52, tmp8 | BIT(2));
597 u8 tmp8;
599 pci_read_config_byte(pdev, PCI_INTERRUPT_LINE, &tmp8);
601 (int) (tmp8 & 0xf0) == 0xf0 ? 0 : tmp8 & 0x0f);
604 pci_read_config_byte(pdev, SATA_CHAN_ENAB, &tmp8);
605 if ((tmp8 & ALL_PORTS) != ALL_PORTS) {
607 (int)tmp8);
608 tmp8 |= ALL_PORTS;
609 pci_write_config_byte(pdev, SATA_CHAN_ENAB, tmp8);
613 pci_read_config_byte(pdev, SATA_INT_GATE, &tmp8);
614 if ((tmp8 & ALL_PORTS) != ALL_PORTS) {
616 (int) tmp8);
617 tmp8 |= ALL_PORTS;
618 pci_write_config_byte(pdev, SATA_INT_GATE, tmp8);
622 pci_read_config_byte(pdev, SATA_NATIVE_MODE, &tmp8);
623 if ((tmp8 & NATIVE_MODE_ALL) != NATIVE_MODE_ALL) {
626 (int) tmp8);
627 tmp8 |= NATIVE_MODE_ALL;
628 pci_write_config_byte(pdev, SATA_NATIVE_MODE, tmp8);
633 pci_read_config_byte(pdev, SVIA_MISC_3, &tmp8);
634 if ((tmp8 & SATA_HOTPLUG) != SATA_HOTPLUG) {
637 (int) tmp8);
638 tmp8 |= SATA_HOTPLUG;
639 pci_write_config_byte(pdev, SVIA_MISC_3, tmp8);