Lines Matching defs:host
284 FISCFG_WAIT_DEV_ERR = (1 << 8), /* wait for host on DevErr */
582 int (*reset_hc)(struct ata_host *host, void __iomem *mmio,
585 void (*reset_bus)(struct ata_host *host, void __iomem *mmio);
609 static int mv5_reset_hc(struct ata_host *host, void __iomem *mmio,
612 static void mv5_reset_bus(struct ata_host *host, void __iomem *mmio);
619 static int mv6_reset_hc(struct ata_host *host, void __iomem *mmio,
626 static int mv_soc_reset_hc(struct ata_host *host,
630 static void mv_soc_reset_bus(struct ata_host *host, void __iomem *mmio);
633 static void mv_reset_pci_bus(struct ata_host *host, void __iomem *mmio);
920 static inline void __iomem *mv_host_base(struct ata_host *host)
922 struct mv_host_priv *hpriv = host->private_data;
928 return mv_port_base(mv_host_base(ap->host), ap->port_no);
1040 static void mv_set_main_irq_mask(struct ata_host *host,
1043 struct mv_host_priv *hpriv = host->private_data;
1064 mv_set_main_irq_mask(ap->host, disable_bits, enable_bits);
1071 struct mv_host_priv *hpriv = ap->host->private_data;
1074 mv_host_base(ap->host), ap->port_no);
1091 static void mv_set_irq_coalescing(struct ata_host *host,
1094 struct mv_host_priv *hpriv = host->private_data;
1114 spin_lock_irqsave(&host->lock, flags);
1115 mv_set_main_irq_mask(host, coal_disable, 0);
1119 * GEN_II/GEN_IIE with dual host controllers:
1149 mv_set_main_irq_mask(host, 0, coal_enable);
1150 spin_unlock_irqrestore(&host->lock, flags);
1174 struct mv_host_priv *hpriv = ap->host->private_data;
1358 struct mv_host_priv *hpriv = link->ap->host->private_data;
1456 * The port is operating in host queuing mode (EDMA) with NCQ
1505 struct mv_host_priv *hpriv = ap->host->private_data;
1558 struct ata_host *host = ap->host;
1559 struct mv_host_priv *hpriv = host->private_data;
1566 hc_mmio = mv_hc_base_from_port(mv_host_base(host), ap->port_no);
1573 struct ata_host *host = ap->host;
1574 struct mv_host_priv *hpriv = host->private_data;
1584 struct ata_port *this_ap = host->ports[port];
1592 hc_mmio = mv_hc_base_from_port(mv_host_base(host), ap->port_no);
1601 struct mv_host_priv *hpriv = ap->host->private_data;
1637 cfg |= (1 << 22); /* enab 4-entry host queue cache */
1663 struct mv_host_priv *hpriv = ap->host->private_data;
1702 struct device *dev = ap->host->dev;
1703 struct mv_host_priv *hpriv = ap->host->private_data;
1759 * This routine uses the host lock to protect the DMA stop.
1912 /* start host DMA transaction */
2318 * mv_qc_issue - Initiate a command to the host
2400 struct mv_host_priv *hpriv = ap->host->private_data;
2639 struct mv_host_priv *hpriv = ap->host->private_data;
2799 struct mv_host_priv *hpriv = ap->host->private_data;
2873 * mv_host_intr - Handle all interrupts on the given host controller
2874 * @host: host specific structure
2880 static int mv_host_intr(struct ata_host *host, u32 main_irq_cause)
2882 struct mv_host_priv *hpriv = host->private_data;
2891 struct ata_port *ap = host->ports[port];
2896 * Each hc within the host has its own hc_irq_cause register,
2945 static int mv_pci_error(struct ata_host *host, void __iomem *mmio)
2947 struct mv_host_priv *hpriv = host->private_data;
2956 dev_err(host->dev, "PCI ERROR; PCI IRQ cause=0x%08x\n", err_cause);
2958 dev_dbg(host->dev, "%s: All regs @ PCI error\n", __func__);
2959 mv_dump_all_regs(mmio, to_pci_dev(host->dev));
2963 for (i = 0; i < host->n_ports; i++) {
2964 ap = host->ports[i];
2988 * @dev_instance: private data; in this case the host structure
2990 * Read the read only register to determine if any host
2996 * This routine holds the host lock while processing pending
3001 struct ata_host *host = dev_instance;
3002 struct mv_host_priv *hpriv = host->private_data;
3007 spin_lock(&host->lock);
3021 handled = mv_pci_error(host, hpriv->base);
3023 handled = mv_host_intr(host, pending_irqs);
3030 spin_unlock(&host->lock);
3054 struct mv_host_priv *hpriv = link->ap->host->private_data;
3068 struct mv_host_priv *hpriv = link->ap->host->private_data;
3080 static void mv5_reset_bus(struct ata_host *host, void __iomem *mmio)
3082 struct pci_dev *pdev = to_pci_dev(host->dev);
3093 mv_reset_pci_bus(host, mmio);
3197 static int mv5_reset_hc(struct ata_host *host, void __iomem *mmio,
3200 struct mv_host_priv *hpriv = host->private_data;
3216 static void mv_reset_pci_bus(struct ata_host *host, void __iomem *mmio)
3218 struct mv_host_priv *hpriv = host->private_data;
3259 static int mv6_reset_hc(struct ata_host *host, void __iomem *mmio,
3279 dev_err(host->dev, "PCI master won't flush\n");
3293 dev_err(host->dev, "can't set global reset\n");
3307 dev_err(host->dev, "can't clear global reset\n");
3476 static int mv_soc_reset_hc(struct ata_host *host,
3479 struct mv_host_priv *hpriv = host->private_data;
3496 static void mv_soc_reset_bus(struct ata_host *host, void __iomem *mmio)
3622 struct mv_host_priv *hpriv = ap->host->private_data;
3666 struct mv_host_priv *hpriv = ap->host->private_data;
3723 static unsigned int mv_in_pcix_mode(struct ata_host *host)
3725 struct mv_host_priv *hpriv = host->private_data;
3737 static int mv_pci_cut_through_okay(struct ata_host *host)
3739 struct mv_host_priv *hpriv = host->private_data;
3743 if (!mv_in_pcix_mode(host)) {
3751 static void mv_60x1b2_errata_pci7(struct ata_host *host)
3753 struct mv_host_priv *hpriv = host->private_data;
3757 if (mv_in_pcix_mode(host)) {
3763 static int mv_chip_id(struct ata_host *host, unsigned int board_idx)
3765 struct pci_dev *pdev = to_pci_dev(host->dev);
3766 struct mv_host_priv *hpriv = host->private_data;
3816 mv_60x1b2_errata_pci7(host);
3865 if (board_idx == chip_6042 && mv_pci_cut_through_okay(host))
3889 dev_alert(host->dev, "BUG: invalid board index %u\n", board_idx);
3908 * mv_init_host - Perform some early initialization of the host.
3909 * @host: ATA host to initialize
3911 * If possible, do an early global reset of the host. Then do
3912 * our port init and clear/unmask all/relevant host interrupts.
3917 static int mv_init_host(struct ata_host *host)
3920 struct mv_host_priv *hpriv = host->private_data;
3923 rc = mv_chip_id(host, hpriv->board_idx);
3939 mv_set_main_irq_mask(host, ~0, 0);
3941 n_hc = mv_get_hc_count(host->ports[0]->flags);
3943 for (port = 0; port < host->n_ports; port++)
3947 rc = hpriv->ops->reset_hc(host, mmio, n_hc);
3952 hpriv->ops->reset_bus(host, mmio);
3955 for (port = 0; port < host->n_ports; port++) {
3956 struct ata_port *ap = host->ports[port];
3965 dev_dbg(host->dev, "HC%i: HC config=0x%08x HC IRQ cause "
3975 /* Clear any currently outstanding host interrupt conditions */
3978 /* and unmask interrupt generation for host regs */
3983 * enable only global host interrupts for now.
3986 mv_set_main_irq_mask(host, 0, PCI_ERR);
3987 mv_set_irq_coalescing(host, irq_coalescing_io_count,
4036 * host
4048 struct ata_host *host;
4072 /* allocate host */
4099 host = ata_host_alloc_pinfo(&pdev->dev, ppi, n_ports);
4102 if (!host || !hpriv)
4114 host->private_data = hpriv;
4117 host->iomap = NULL;
4178 rc = mv_init_host(host);
4183 (unsigned)MV_MAX_Q_DEPTH, host->n_ports);
4185 rc = ata_host_activate(host, irq, mv_interrupt, IRQF_SHARED, &mv6_sht);
4215 struct ata_host *host = platform_get_drvdata(pdev);
4216 struct mv_host_priv *hpriv = host->private_data;
4218 ata_host_detach(host);
4224 for (port = 0; port < host->n_ports; port++) {
4236 struct ata_host *host = platform_get_drvdata(pdev);
4238 if (host)
4239 ata_host_suspend(host, state);
4245 struct ata_host *host = platform_get_drvdata(pdev);
4249 if (host) {
4250 struct mv_host_priv *hpriv = host->private_data;
4260 ret = mv_init_host(host);
4265 ata_host_resume(host);
4318 * @host: ATA host to print info about
4325 static void mv_print_info(struct ata_host *host)
4327 struct pci_dev *pdev = to_pci_dev(host->dev);
4328 struct mv_host_priv *hpriv = host->private_data;
4353 gen, (unsigned)MV_MAX_Q_DEPTH, host->n_ports,
4358 * mv_pci_init_one - handle a positive probe of a PCI Marvell host
4360 * @ent: PCI device ID entry for the matched host
4370 struct ata_host *host;
4376 /* allocate host */
4379 host = ata_host_alloc_pinfo(&pdev->dev, ppi, n_ports);
4381 if (!host || !hpriv)
4383 host->private_data = hpriv;
4397 host->iomap = pcim_iomap_table(pdev);
4398 hpriv->base = host->iomap[MV_PRIMARY_BAR];
4410 for (port = 0; port < host->n_ports; port++) {
4411 struct ata_port *ap = host->ports[port];
4420 rc = mv_init_host(host);
4429 mv_print_info(host);
4433 return ata_host_activate(host, pdev->irq, mv_interrupt, IRQF_SHARED,
4440 struct ata_host *host = pci_get_drvdata(pdev);
4448 rc = mv_init_host(host);
4452 ata_host_resume(host);