Lines Matching defs:cfg
1599 u32 cfg;
1605 cfg = EDMA_CFG_Q_DEPTH; /* always 0x1f for *all* chips */
1610 cfg |= (1 << 8); /* enab config burst size mask */
1613 cfg |= EDMA_CFG_RD_BRST_EXT | EDMA_CFG_WR_BUFF_LEN;
1632 cfg |= EDMA_CFG_EDMA_FBS; /* FIS-based switching */
1635 cfg |= (1 << 23); /* do not mask PM field in rx'd FIS */
1637 cfg |= (1 << 22); /* enab 4-entry host queue cache */
1639 cfg |= (1 << 18); /* enab early completion */
1642 cfg |= (1 << 17); /* enab cut-thru (dis stor&forwrd) */
1654 cfg |= EDMA_CFG_NCQ;
1658 writelfl(cfg, port_mmio + EDMA_CFG);