Lines Matching defs:addr
412 BMDMA_PRD_LOW = 0x22c, /* bmdma PRD addr 31:0 */
413 BMDMA_PRD_HIGH = 0x230, /* bmdma PRD addr 63:32 */
482 __le32 addr;
498 __le32 addr;
860 static inline void writelfl(unsigned long data, void __iomem *addr)
862 writel(data, addr);
863 (void) readl(addr); /* flush to avoid PCI posted write */
959 * @addr: hardware address of the register
966 static inline void mv_write_cached_reg(void __iomem *addr, u32 *old, u32 new)
980 laddr = (unsigned long)addr & 0xffff;
984 writelfl(new, addr); /* read after write */
988 writel(new, addr); /* unaffected by the errata */
1357 void __iomem *addr = mv_ap_base(link->ap) + ofs;
1373 if ((val & 0xf) == 1 || (readl(addr) & 0xf) == 1)
1395 writelfl(val, addr);
1790 dma_addr_t addr = sg_dma_address(sg);
1794 u32 offset = addr & 0xffff;
1800 mv_sg->addr = cpu_to_le32(addr & 0xffffffff);
1801 mv_sg->addr_hi = cpu_to_le32((addr >> 16) >> 16);
1806 addr += len;
1818 static void mv_crqb_pack_cmd(__le16 *cmdw, u8 data, u8 addr, unsigned last)
1820 u16 tmp = data | (addr << CRQB_CMD_ADDR_SHIFT) | CRQB_CMD_CS |
1888 /* load PRD table addr. */
2159 crqb->addr = cpu_to_le32(pp->sg_tbl_dma[qc->hw_tag] & 0xffffffff);
3056 void __iomem *addr = mv5_phy_base(mmio, link->ap->port_no);
3060 *val = readl(addr + ofs);
3070 void __iomem *addr = mv5_phy_base(mmio, link->ap->port_no);
3074 writelfl(val, addr + ofs);