Lines Matching defs:mmio_base
461 void __iomem *mmio_base = host->iomap[PDC_MMIO_BAR];
467 bccrl = ioread32(mmio_base + PDC_BYTE_COUNT) & 0x7fff;
468 bccrh = ioread32(mmio_base + PDC_BYTE_COUNT + 0x100) & 0x7fff;
471 bccrlv = ioread32(mmio_base + PDC_BYTE_COUNT) & 0x7fff;
472 bccrhv = ioread32(mmio_base + PDC_BYTE_COUNT + 0x100) & 0x7fff;
502 void __iomem *mmio_base = host->iomap[PDC_MMIO_BAR];
521 pll_ctl = ioread16(mmio_base + PDC_PLL_CTL);
560 iowrite16(pll_ctl, mmio_base + PDC_PLL_CTL);
561 ioread16(mmio_base + PDC_PLL_CTL); /* flush */
570 pll_ctl = ioread16(mmio_base + PDC_PLL_CTL);
585 void __iomem *mmio_base = host->iomap[PDC_MMIO_BAR];
592 scr = ioread32(mmio_base + PDC_SYS_CTL);
594 iowrite32(scr | (0x01 << 14), mmio_base + PDC_SYS_CTL);
595 ioread32(mmio_base + PDC_SYS_CTL); /* flush */
609 scr = ioread32(mmio_base + PDC_SYS_CTL);
611 iowrite32(scr & ~(0x01 << 14), mmio_base + PDC_SYS_CTL);
612 ioread32(mmio_base + PDC_SYS_CTL); /* flush */
690 void __iomem *mmio_base;
714 mmio_base = host->iomap[PDC_MMIO_BAR];
719 pdc_ata_setup_port(&ap->ioaddr, mmio_base + cmd_offset[i]);
720 ap->ioaddr.bmdma_addr = mmio_base + bmdma_offset[i];