Lines Matching refs:treg
237 u32 treg[2][2];
378 writel(priv->treg[device][0], rbase + IDE_KAUAI_PIO_CONFIG);
379 writel(priv->treg[device][1], rbase + IDE_KAUAI_ULTRA_CONFIG);
381 writel(priv->treg[device][0], rbase + IDE_TIMING_CONFIG);
406 priv->treg[adev->devno][0] = priv->treg[adev->devno][1] = 0;
417 /* PIO timings only ever use the first treg */
418 priv->treg[adev->devno][0] |= t->reg1;
429 priv->treg[adev->devno][0] |= t->reg1;
430 priv->treg[adev->devno][1] |= t->reg2;
433 priv->treg[adev->devno][0],
434 priv->treg[adev->devno][1]);
470 priv->treg[0][0] = priv->treg[1][0] = value;
471 priv->treg[0][1] = priv->treg[1][1] = value2;
610 (priv->treg[dev][0] & TR_66_UDMA_EN)) {
612 u32 reg = priv->treg[dev][0];