Lines Matching defs:clock
145 u8 clock[2];
490 int clock;
499 /* Read VLB clock strapping */
500 clock = 1000000000 / khz[ioread8(ap->ioaddr.lbah_addr) & 0x03];
503 ata_timing_compute(adev, adev->pio_mode, &t, clock, 1000);
508 ata_timing_compute(pair, pair->pio_mode, &tp, clock, 1000);
565 int clock;
570 /* Get the clock */
578 /* Read VLB clock strapping */
579 clock = 1000000000 / khz[sysclk];
582 ata_timing_compute(adev, adev->pio_mode, &t, clock, 1000);
587 ata_timing_compute(pair, pair->pio_mode, &tp, clock, 1000);
669 * In single channel mode the 6580 has one clock per device and we can
670 * avoid the requirement to clock switch. We also have to load the timing
671 * into the right clock according to whether we are master or slave.
673 * In dual channel mode the 6580 has one clock per channel and we have
695 ld_qdi->clock[adev->devno] = timing;
721 if (ld_qdi->clock[adev->devno] != ld_qdi->last) {
723 ld_qdi->last = ld_qdi->clock[adev->devno];
724 outb(ld_qdi->clock[adev->devno], ld_qdi->timing +