Lines Matching refs:state
63 struct pata_icside_state *state;
88 struct pata_icside_state *state = ec->irq_data;
90 writeb(0, state->irq_port + ICS_ARCIN_V5_INTROFFSET);
98 struct pata_icside_state *state = ec->irq_data;
100 readb(state->irq_port + ICS_ARCIN_V5_INTROFFSET);
115 struct pata_icside_state *state = ec->irq_data;
116 void __iomem *base = state->irq_port;
118 if (!state->port[0].disabled)
120 if (!state->port[1].disabled)
129 struct pata_icside_state *state = ec->irq_data;
131 readb(state->irq_port + ICS_ARCIN_V6_INTROFFSET_1);
132 readb(state->irq_port + ICS_ARCIN_V6_INTROFFSET_2);
140 struct pata_icside_state *state = ec->irq_data;
142 return readb(state->irq_port + ICS_ARCIN_V6_INTRSTAT_1) & 1 ||
143 readb(state->irq_port + ICS_ARCIN_V6_INTRSTAT_2) & 1;
190 struct pata_icside_state *state = ap->host->private_data;
222 state->port[ap->port_no].speed[adev->devno] = cycle;
228 struct pata_icside_state *state = ap->host->private_data;
235 BUG_ON(dma_channel_active(state->dma));
240 writeb(state->port[ap->port_no].port_sel, state->ioc_base);
242 set_dma_speed(state->dma, state->port[ap->port_no].speed[qc->dev->devno]);
243 set_dma_sg(state->dma, qc->sg, qc->n_elem);
244 set_dma_mode(state->dma, write ? DMA_MODE_WRITE : DMA_MODE_READ);
253 struct pata_icside_state *state = ap->host->private_data;
255 BUG_ON(dma_channel_active(state->dma));
256 enable_dma(state->dma);
262 struct pata_icside_state *state = ap->host->private_data;
264 disable_dma(state->dma);
272 struct pata_icside_state *state = ap->host->private_data;
275 irq_port = state->irq_port + (ap->port_no ? ICS_ARCIN_V6_INTRSTAT_2 :
283 struct pata_icside_state *state = info->state;
288 state->port[0].speed[i] = 480;
289 state->port[1].speed[i] = 480;
293 state->dma = ec->dma;
310 struct pata_icside_state *state = ap->host->private_data;
315 state->port[ap->port_no].disabled = 1;
317 if (state->type == ICS_TYPE_V6) {
323 void __iomem *irq_port = state->irq_port +
378 struct pata_icside_state *state = info->state;
385 state->irq_port = base;
401 struct pata_icside_state *state = info->state;
425 state->irq_port = easi_base;
426 state->ioc_base = ioc_base;
427 state->port[0].port_sel = sel;
428 state->port[1].port_sel = sel | 1;
453 ecard_setirq(ec, info->irqops, info->state);
464 host->private_data = info->state;
485 struct pata_icside_state *state;
494 state = devm_kzalloc(&ec->dev, sizeof(*state), GFP_KERNEL);
495 if (!state) {
500 state->type = ICS_TYPE_NOTYPE;
501 state->dma = NO_DMA;
513 state->type = type;
517 info.state = state;
520 switch (state->type) {
577 struct pata_icside_state *state = host->private_data;
578 if (state->ioc_base)
579 writeb(0, state->ioc_base);
586 struct pata_icside_state *state = host->private_data;
596 if (state->dma != NO_DMA)
597 free_dma(state->dma);