Lines Matching refs:ftide
142 struct ftide010 *ftide = ap->host->private_data;
160 clkreg = readb(ftide->base + FTIDE010_CLK_MOD);
166 dev_dbg(ftide->dev, "set UDMA mode %02x, index %d\n",
183 dev_dbg(ftide->dev, "UDMA write clkreg = %02x, timreg = %02x\n",
186 writeb(clkreg, ftide->base + FTIDE010_CLK_MOD);
187 writeb(timreg, ftide->base + FTIDE010_UDMA_TIMING0 + devno);
190 dev_dbg(ftide->dev, "set MWDMA mode %02x, index %d\n",
201 dev_dbg(ftide->dev,
205 writeb(clkreg, ftide->base + FTIDE010_CLK_MOD);
206 writeb(timreg, ftide->base + FTIDE010_MWDMA_TIMING);
221 struct ftide010 *ftide = ap->host->private_data;
224 dev_dbg(ftide->dev, "set PIO mode %02x, index %d\n",
227 ftide->base + FTIDE010_PIO_TIMING);
271 struct ftide010 *ftide = ap->host->private_data;
272 struct device *dev = ftide->dev;
273 struct sata_gemini *sg = ftide->sg;
281 if (ftide->master_to_sata0) {
287 if (ftide->master_to_sata1) {
294 if (ftide->slave_to_sata0 && !ftide->master_to_sata0) {
301 if (ftide->slave_to_sata1 && !ftide->master_to_sata1) {
314 struct ftide010 *ftide = ap->host->private_data;
315 struct device *dev = ftide->dev;
316 struct sata_gemini *sg = ftide->sg;
318 if (ftide->master_to_sata0) {
322 if (ftide->master_to_sata1) {
327 if (ftide->slave_to_sata0 && !ftide->master_to_sata0) {
332 if (ftide->slave_to_sata1 && !ftide->master_to_sata1) {
340 struct ftide010 *ftide = ap->host->private_data;
346 return ftide->master_cbl;
349 static int pata_ftide010_gemini_init(struct ftide010 *ftide,
353 struct device *dev = ftide->dev;
361 ftide->sg = sg;
393 ftide->master_cbl = ATA_CBL_SATA;
394 ftide->slave_cbl = ATA_CBL_PATA40;
395 ftide->master_to_sata0 = true;
398 ftide->master_cbl = ATA_CBL_SATA;
399 ftide->slave_cbl = ATA_CBL_NONE;
400 ftide->master_to_sata0 = true;
403 ftide->master_cbl = ATA_CBL_PATA40;
404 ftide->slave_cbl = ATA_CBL_PATA40;
407 ftide->master_cbl = ATA_CBL_SATA;
408 ftide->slave_cbl = ATA_CBL_SATA;
409 ftide->master_to_sata0 = true;
410 ftide->slave_to_sata1 = true;
416 ftide->master_cbl = ATA_CBL_SATA;
417 ftide->slave_cbl = ATA_CBL_NONE;
418 ftide->master_to_sata1 = true;
421 ftide->master_cbl = ATA_CBL_SATA;
422 ftide->slave_cbl = ATA_CBL_PATA40;
423 ftide->master_to_sata1 = true;
426 ftide->master_cbl = ATA_CBL_SATA;
427 ftide->slave_cbl = ATA_CBL_SATA;
428 ftide->slave_to_sata0 = true;
429 ftide->master_to_sata1 = true;
432 ftide->master_cbl = ATA_CBL_PATA40;
433 ftide->slave_cbl = ATA_CBL_PATA40;
442 static int pata_ftide010_gemini_init(struct ftide010 *ftide,
457 struct ftide010 *ftide;
463 ftide = devm_kzalloc(dev, sizeof(*ftide), GFP_KERNEL);
464 if (!ftide)
466 ftide->dev = dev;
472 ftide->base = devm_platform_get_and_ioremap_resource(pdev, 0, &res);
473 if (IS_ERR(ftide->base))
474 return PTR_ERR(ftide->base);
476 ftide->pclk = devm_clk_get(dev, "PCLK");
477 if (!IS_ERR(ftide->pclk)) {
478 ret = clk_prepare_enable(ftide->pclk);
494 ret = pata_ftide010_gemini_init(ftide,
501 ftide->master_cbl = ATA_CBL_PATA40;
502 ftide->slave_cbl = ATA_CBL_PATA40;
505 ftide->host = ata_host_alloc_pinfo(dev, ppi, 1);
506 if (!ftide->host) {
510 ftide->host->private_data = ftide;
512 for (i = 0; i < ftide->host->n_ports; i++) {
513 struct ata_port *ap = ftide->host->ports[i];
516 ioaddr->bmdma_addr = ftide->base + FTIDE010_DMA_REG;
517 ioaddr->cmd_addr = ftide->base + FTIDE010_CMD_DATA;
518 ioaddr->ctl_addr = ftide->base + FTIDE010_ALTSTAT_CTRL;
519 ioaddr->altstatus_addr = ftide->base + FTIDE010_ALTSTAT_CTRL;
524 readl(ftide->base + FTIDE010_IDE_DEVICE_ID), irq, res);
526 ret = ata_host_activate(ftide->host, irq, ata_bmdma_interrupt,
534 clk_disable_unprepare(ftide->pclk);
542 struct ftide010 *ftide = host->private_data;
544 ata_host_detach(ftide->host);
545 clk_disable_unprepare(ftide->pclk);