Lines Matching defs:classes
2533 unsigned int *classes, unsigned long deadline,
2540 classes[dev->devno] = ATA_DEV_UNKNOWN;
2542 return reset(link, classes, deadline);
2564 unsigned int *classes = ehc->classes;
2666 classes[dev->devno] = ATA_DEV_NONE;
2677 * bang classes, thaw and return.
2681 classes[dev->devno] = ATA_DEV_NONE;
2707 trace_ata_link_hardreset_begin(link, classes, deadline);
2710 trace_ata_link_softreset_begin(link, classes, deadline);
2713 rc = ata_do_reset(link, reset, classes, deadline, true);
2715 trace_ata_link_hardreset_end(link, classes, rc);
2717 trace_ata_link_softreset_end(link, classes, rc);
2731 trace_ata_slave_hardreset_begin(slave, classes,
2733 tmp = ata_do_reset(slave, reset, classes, deadline,
2735 trace_ata_slave_hardreset_end(slave, classes, tmp);
2763 trace_ata_link_softreset_begin(link, classes, deadline);
2764 rc = ata_do_reset(link, reset, classes, deadline, true);
2765 trace_ata_link_softreset_end(link, classes, rc);
2795 classes[dev->devno] = ATA_DEV_ATA;
2797 classes[dev->devno] = ATA_DEV_SEMB_UNSUP;
2818 postreset(link, classes);
2819 trace_ata_link_postreset(link, classes, rc);
2821 postreset(slave, classes);
2822 trace_ata_slave_postreset(slave, classes, rc);
2844 if (classes[dev->devno] == ATA_DEV_UNKNOWN) {
2846 classes[dev->devno] = ATA_DEV_NONE;
2850 if (ata_class_enabled(classes[dev->devno]))
2853 classes[dev->devno]);
2854 classes[dev->devno] = ATA_DEV_NONE;
2855 } else if (classes[dev->devno] == ATA_DEV_UNKNOWN) {
2858 classes[dev->devno] = ATA_DEV_NONE;
3081 rc = ata_dev_revalidate(dev, ehc->classes[dev->devno],
3097 ata_class_enabled(ehc->classes[dev->devno])) {
3104 dev->class = ehc->classes[dev->devno];
3113 ehc->classes[dev->devno] = dev->class;
3149 dev->class = ehc->classes[dev->devno];
3534 ehc->classes[dev->devno] != ATA_DEV_NONE)
3738 ehc->classes[dev->devno] = ATA_DEV_UNKNOWN;