Lines Matching defs:smmu
412 struct acpi_iort_smmu_v3 *smmu;
424 smmu = (struct acpi_iort_smmu_v3 *)node->node_data;
430 if (smmu->event_gsiv && smmu->pri_gsiv &&
431 smmu->gerr_gsiv && smmu->sync_gsiv)
433 } else if (!(smmu->flags & ACPI_IORT_SMMU_V3_DEVICEID_VALID)) {
437 if (smmu->id_mapping_index >= node->mapping_count) {
443 return smmu->id_mapping_index;
888 struct acpi_iort_node *smmu,
981 struct acpi_iort_node *smmu = NULL;
1032 iort_get_rmrs(node, smmu, sids, num_sids, head);
1093 struct acpi_iort_smmu_v3 *smmu;
1095 smmu = (struct acpi_iort_smmu_v3 *)iommu->node_data;
1096 if (smmu->model == ACPI_IORT_SMMU_V3_HISILICON_HI161X)
1453 struct acpi_iort_smmu_v3 *smmu;
1458 smmu = (struct acpi_iort_smmu_v3 *)node->node_data;
1460 if (smmu->event_gsiv)
1463 if (smmu->pri_gsiv)
1466 if (smmu->gerr_gsiv)
1469 if (smmu->sync_gsiv)
1475 static bool arm_smmu_v3_is_combined_irq(struct acpi_iort_smmu_v3 *smmu)
1481 if (smmu->model != ACPI_IORT_SMMU_V3_CAVIUM_CN99XX)
1488 return smmu->event_gsiv == smmu->pri_gsiv &&
1489 smmu->event_gsiv == smmu->gerr_gsiv &&
1490 smmu->event_gsiv == smmu->sync_gsiv;
1493 static unsigned long arm_smmu_v3_resource_size(struct acpi_iort_smmu_v3 *smmu)
1499 if (smmu->model == ACPI_IORT_SMMU_V3_CAVIUM_CN99XX)
1508 struct acpi_iort_smmu_v3 *smmu;
1512 smmu = (struct acpi_iort_smmu_v3 *)node->node_data;
1514 res[num_res].start = smmu->base_address;
1515 res[num_res].end = smmu->base_address +
1516 arm_smmu_v3_resource_size(smmu) - 1;
1520 if (arm_smmu_v3_is_combined_irq(smmu)) {
1521 if (smmu->event_gsiv)
1522 acpi_iort_register_irq(smmu->event_gsiv, "combined",
1527 if (smmu->event_gsiv)
1528 acpi_iort_register_irq(smmu->event_gsiv, "eventq",
1532 if (smmu->pri_gsiv)
1533 acpi_iort_register_irq(smmu->pri_gsiv, "priq",
1537 if (smmu->gerr_gsiv)
1538 acpi_iort_register_irq(smmu->gerr_gsiv, "gerror",
1542 if (smmu->sync_gsiv)
1543 acpi_iort_register_irq(smmu->sync_gsiv, "cmdq-sync",
1552 struct acpi_iort_smmu_v3 *smmu;
1556 smmu = (struct acpi_iort_smmu_v3 *)node->node_data;
1558 attr = (smmu->flags & ACPI_IORT_SMMU_V3_COHACC_OVERRIDE) ?
1575 struct acpi_iort_smmu_v3 *smmu;
1577 smmu = (struct acpi_iort_smmu_v3 *)node->node_data;
1578 if (smmu->flags & ACPI_IORT_SMMU_V3_PXM_VALID) {
1579 int dev_node = pxm_to_node(smmu->pxm);
1586 smmu->base_address,
1587 smmu->pxm);
1597 struct acpi_iort_smmu *smmu;
1600 smmu = (struct acpi_iort_smmu *)node->node_data;
1610 return smmu->context_interrupt_count + 2;
1616 struct acpi_iort_smmu *smmu;
1621 smmu = (struct acpi_iort_smmu *)node->node_data;
1623 res[num_res].start = smmu->base_address;
1624 res[num_res].end = smmu->base_address + smmu->span - 1;
1628 glb_irq = ACPI_ADD_PTR(u64, node, smmu->global_interrupt_offset);
1633 acpi_iort_register_irq(hw_irq, "arm-smmu-global", trigger,
1637 ctx_irq = ACPI_ADD_PTR(u64, node, smmu->context_interrupt_offset);
1638 for (i = 0; i < smmu->context_interrupt_count; i++) {
1642 acpi_iort_register_irq(hw_irq, "arm-smmu-context", trigger,
1650 struct acpi_iort_smmu *smmu;
1654 smmu = (struct acpi_iort_smmu *)node->node_data;
1656 attr = (smmu->flags & ACPI_IORT_SMMU_COHERENT_WALK) ?
1746 .name = "arm-smmu-v3",
1754 .name = "arm-smmu",
1761 .name = "arm-smmu-v3-pmcg",