Lines Matching refs:error_count
7783 u32 i, j, glbl_sts_val, arb_err_val, num_error_causes, error_count = 0;
7812 error_count++;
7829 error_count++;
7834 return error_count;
8256 u32 razwi_mask_info, razwi_intr = 0, error_count = 0;
8275 error_count++;
8285 return error_count;
8290 u32 i, sts_val, sts_clr_val = 0, error_count = 0;
8299 error_count++;
8305 return error_count;
8312 u32 error_count = 0;
8354 error_count = _gaudi2_handle_qm_sei_err(hdev, qman_base, event_type);
8359 error_count += _gaudi2_handle_qm_sei_err(hdev,
8368 return error_count;
8373 u32 qid_base, error_count = 0;
8478 error_count = gaudi2_handle_qman_err_generic(hdev, event_type, qman_base, qid_base);
8482 error_count += _gaudi2_handle_qm_sei_err(hdev, qman_base, event_type);
8488 return error_count;
8493 u32 i, sts_val, sts_clr_val, error_count = 0, arc_farm;
8506 error_count++;
8515 return error_count;
8520 u32 i, sts_val, sts_clr_val = 0, error_count = 0;
8529 error_count++;
8537 return error_count;
8545 u32 error_count = 0;
8552 error_count++;
8559 return error_count;
8567 u32 error_count = 0;
8574 error_count++;
8581 return error_count;
8587 u32 sts_addr, sts_val, sts_clr_val = 0, error_count = 0;
8607 error_count++;
8618 return error_count;
8624 u32 sts_addr, sts_val, sts_clr_addr, sts_clr_val = 0, error_count = 0;
8637 error_count++;
8649 return error_count;
8655 int i, error_count = 0;
8661 error_count++;
8666 return error_count;
8672 u32 sts_addr, sts_val, sts_clr_addr, sts_clr_val = 0, error_count = 0;
8685 error_count++;
8696 return error_count;
8702 u32 error_count = 0;
8714 error_count++;
8719 return error_count;
8724 u32 error_count = 0;
8731 error_count++;
8736 return error_count;
8775 u32 error_count = 0;
8787 error_count++;
8798 return error_count;
8805 u32 error_count = 0;
8812 error_count++;
8816 return error_count;
8821 u32 error_count = 0;
8828 error_count++;
8832 return error_count;
8892 u32 spi_sei_cause, interrupt_clr = 0x0, error_count = 0;
8910 error_count++;
8920 return error_count;
8926 cq_intr_addr, cq_intr_val, cq_intr_queue_index, error_count = 0;
8951 error_count++;
8967 error_count++;
8975 return error_count;
9073 u32 error_count = 0;
9094 error_count = gaudi2_handle_mmu_spi_sei_generic(hdev, event_type, mmu_base,
9098 return error_count;
9286 u32 i, error_count = 0;
9292 error_count++;
9295 return error_count;
9356 u32 p2p_intr, msix_gw_intr, error_count = 0;
9367 error_count++;
9376 error_count++;
9379 return error_count;
9385 u64 lbw_rd, lbw_wr, hbw_rd, hbw_wr, cause, error_count = 0;
9397 error_count++;
9404 error_count++;
9407 return error_count;
9412 u32 error_count = 0;
9419 error_count++;
9425 return error_count;
9467 u32 index, ctl, reset_flags = 0, error_count = 0;
9491 error_count++;
9499 error_count = gaudi2_handle_qman_err(hdev, event_type, &event_mask);
9504 error_count = gaudi2_handle_arc_farm_sei_err(hdev, event_type);
9509 error_count = gaudi2_handle_cpu_sei_err(hdev, event_type);
9516 error_count = gaudi2_handle_qm_sei_err(hdev, event_type, true, &event_mask);
9523 error_count = gaudi2_handle_rot_err(hdev, index, event_type,
9525 error_count += gaudi2_handle_qm_sei_err(hdev, event_type, false, &event_mask);
9531 error_count = gaudi2_tpc_ack_interrupts(hdev, index, event_type,
9533 error_count += gaudi2_handle_qm_sei_err(hdev, event_type, false, &event_mask);
9539 error_count = gaudi2_handle_dec_err(hdev, index, event_type, &event_mask);
9570 error_count = gaudi2_tpc_ack_interrupts(hdev, index, event_type,
9587 error_count = gaudi2_handle_dec_err(hdev, index, event_type, &event_mask);
9598 error_count = gaudi2_handle_mme_err(hdev, index, event_type, &event_mask);
9599 error_count += gaudi2_handle_qm_sei_err(hdev, event_type, false, &event_mask);
9610 error_count = gaudi2_handle_mme_err(hdev, index, event_type, &event_mask);
9621 error_count = gaudi2_handle_mme_wap_err(hdev, index, event_type, &event_mask);
9627 error_count = gaudi2_handle_kdma_core_event(hdev, event_type,
9633 error_count = gaudi2_handle_dma_core_event(hdev, event_type,
9639 error_count = gaudi2_handle_dma_core_event(hdev, event_type,
9645 error_count = gaudi2_print_pcie_addr_dec_info(hdev, event_type,
9655 error_count = gaudi2_handle_mmu_spi_sei_err(hdev, event_type, &event_mask);
9661 error_count = gaudi2_handle_hif_fatal(hdev, event_type,
9668 error_count = gaudi2_handle_pif_fatal(hdev, event_type,
9675 error_count = gaudi2_ack_psoc_razwi_event_handler(hdev, &event_mask);
9685 error_count++;
9689 error_count = gaudi2_handle_hbm_cattrip(hdev, event_type,
9695 error_count = gaudi2_handle_hbm_mc_spi(hdev,
9701 error_count = gaudi2_handle_pcie_drain(hdev, &eq_entry->pcie_drain_ind_data);
9707 error_count = gaudi2_handle_psoc_drain(hdev,
9714 error_count = GAUDI2_NA_EVENT_CAUSE;
9719 error_count = GAUDI2_NA_EVENT_CAUSE;
9727 error_count = gaudi2_handle_mme_sbte_err(hdev, event_type,
9732 error_count = GAUDI2_NA_EVENT_CAUSE;
9737 error_count = GAUDI2_NA_EVENT_CAUSE;
9742 error_count = GAUDI2_NA_EVENT_CAUSE;
9746 error_count = GAUDI2_NA_EVENT_CAUSE;
9751 error_count = GAUDI2_NA_EVENT_CAUSE;
9805 error_count = GAUDI2_NA_EVENT_CAUSE;
9814 error_count = GAUDI2_NA_EVENT_CAUSE;
9819 error_count = GAUDI2_NA_EVENT_CAUSE;
9826 error_count = GAUDI2_NA_EVENT_CAUSE;
9831 error_count = gaudi2_handle_pcie_p2p_msix(hdev, event_type);
9837 error_count = gaudi2_handle_sm_err(hdev, event_type, index);
9842 error_count = GAUDI2_NA_EVENT_CAUSE;
9849 error_count = GAUDI2_NA_EVENT_CAUSE;
9855 error_count = GAUDI2_NA_EVENT_CAUSE;
9861 error_count = GAUDI2_NA_EVENT_CAUSE;
9867 error_count = hl_arc_event_handle(hdev, event_type, &eq_entry->arc_data);
9874 error_count = GAUDI2_NA_EVENT_CAUSE;
9882 error_count = GAUDI2_NA_EVENT_CAUSE;
9890 if (error_count == GAUDI2_NA_EVENT_CAUSE && !is_info_event(event_type))
9892 else if (error_count == 0)