Lines Matching defs:qman_base
7756 static void print_lower_qman_data_on_err(struct hl_device *hdev, u64 qman_base)
7761 lo = RREG32(qman_base + QM_CQ_PTR_LO_4_OFFSET);
7762 hi = RREG32(qman_base + QM_CQ_PTR_HI_4_OFFSET);
7764 cq_ptr_size = RREG32(qman_base + QM_CQ_TSIZE_4_OFFSET);
7766 lo = RREG32(qman_base + QM_ARC_CQ_PTR_LO_OFFSET);
7767 hi = RREG32(qman_base + QM_ARC_CQ_PTR_HI_OFFSET);
7769 arc_cq_ptr_size = RREG32(qman_base + QM_ARC_CQ_TSIZE_OFFSET);
7771 lo = RREG32(qman_base + QM_CP_CURRENT_INST_LO_4_OFFSET);
7772 hi = RREG32(qman_base + QM_CP_CURRENT_INST_HI_4_OFFSET);
7781 u64 qman_base, u32 qid_base)
7787 glbl_sts_addr = qman_base + (mmDCORE0_TPC0_QM_GLBL_ERR_STS_0 - mmDCORE0_TPC0_QM_BASE);
7788 arb_err_addr = qman_base + (mmDCORE0_TPC0_QM_ARB_ERR_CAUSE - mmDCORE0_TPC0_QM_BASE);
7816 print_lower_qman_data_on_err(hdev, qman_base);
8288 static int _gaudi2_handle_qm_sei_err(struct hl_device *hdev, u64 qman_base, u16 event_type)
8292 sts_val = RREG32(qman_base + QM_SEI_STATUS_OFFSET);
8303 WREG32(qman_base + QM_SEI_STATUS_OFFSET, sts_clr_val);
8313 u64 qman_base;
8319 qman_base = mmDCORE0_TPC0_QM_BASE +
8325 qman_base = mmDCORE0_TPC6_QM_BASE;
8335 qman_base = mmDCORE0_MME_QM_BASE + index * DCORE_OFFSET;
8341 qman_base = mmPDMA0_QM_BASE + index * PDMA_OFFSET;
8347 qman_base = mmROT0_QM_BASE + index * ROT_OFFSET;
8354 error_count = _gaudi2_handle_qm_sei_err(hdev, qman_base, event_type);
8360 qman_base + NIC_QM_OFFSET, event_type);
8374 u64 qman_base;
8381 qman_base = mmDCORE0_TPC0_QM_BASE + index * DCORE_TPC_OFFSET;
8386 qman_base = mmDCORE1_TPC0_QM_BASE + index * DCORE_TPC_OFFSET;
8391 qman_base = mmDCORE2_TPC0_QM_BASE + index * DCORE_TPC_OFFSET;
8396 qman_base = mmDCORE3_TPC0_QM_BASE + index * DCORE_TPC_OFFSET;
8400 qman_base = mmDCORE0_TPC6_QM_BASE;
8404 qman_base = mmDCORE0_MME_QM_BASE;
8408 qman_base = mmDCORE1_MME_QM_BASE;
8412 qman_base = mmDCORE2_MME_QM_BASE;
8416 qman_base = mmDCORE3_MME_QM_BASE;
8421 qman_base = mmDCORE0_EDMA0_QM_BASE;
8426 qman_base = mmDCORE0_EDMA1_QM_BASE;
8431 qman_base = mmDCORE1_EDMA0_QM_BASE;
8436 qman_base = mmDCORE1_EDMA1_QM_BASE;
8441 qman_base = mmDCORE2_EDMA0_QM_BASE;
8446 qman_base = mmDCORE2_EDMA1_QM_BASE;
8451 qman_base = mmDCORE3_EDMA0_QM_BASE;
8456 qman_base = mmDCORE3_EDMA1_QM_BASE;
8460 qman_base = mmPDMA0_QM_BASE;
8464 qman_base = mmPDMA1_QM_BASE;
8468 qman_base = mmROT0_QM_BASE;
8472 qman_base = mmROT1_QM_BASE;
8478 error_count = gaudi2_handle_qman_err_generic(hdev, event_type, qman_base, qid_base);
8482 error_count += _gaudi2_handle_qm_sei_err(hdev, qman_base, event_type);