Lines Matching defs:inst
2139 int dcore, inst, tpc_seq;
2146 for (inst = 0; inst < NUM_OF_TPC_PER_DCORE; inst++) {
2147 tpc_seq = dcore * NUM_OF_TPC_PER_DCORE + inst;
2152 offset = (DCORE_OFFSET * dcore) + (DCORE_TPC_OFFSET * inst);
2154 ctx->fn(hdev, dcore, inst, offset, ctx);
2157 dcore, inst);
3749 int dcore, inst;
3763 for (inst = 0 ; inst < NUM_OF_EDMA_PER_DCORE ; inst++) {
3764 u8 seq = dcore * NUM_OF_EDMA_PER_DCORE + inst;
3771 inst * DCORE_EDMA_OFFSET;
3861 int dcore, inst;
3874 for (inst = 0 ; inst < NUM_OF_EDMA_PER_DCORE ; inst++) {
3875 u8 seq = dcore * NUM_OF_EDMA_PER_DCORE + inst;
3882 inst * DCORE_EDMA_OFFSET;
3949 int dcore, inst;
3962 for (inst = 0 ; inst < NUM_OF_EDMA_PER_DCORE ; inst++) {
3963 u8 seq = dcore * NUM_OF_EDMA_PER_DCORE + inst;
3970 inst * DCORE_EDMA_OFFSET;
5096 int dcore, inst;
5102 for (inst = 0 ; inst < NUM_OF_EDMA_PER_DCORE ; inst++) {
5103 u8 seq = dcore * NUM_OF_EDMA_PER_DCORE + inst;
5344 static void gaudi2_init_tpc_config(struct hl_device *hdev, int dcore, int inst,
5352 queue_id_base = cfg_data->dcore_tpc_qid_base[dcore] + (inst * NUM_OF_PQ_PER_QMAN);
5354 if (dcore == 0 && inst == (NUM_DCORE0_TPC - 1))
5358 seq = dcore * NUM_OF_TPC_PER_DCORE + inst;
7192 static void gaudi2_is_tpc_engine_idle(struct hl_device *hdev, int dcore, int inst, u32 offset,
7200 if ((dcore == 0) && (inst == (NUM_DCORE0_TPC - 1)))
7204 dcore * GAUDI2_ENGINE_ID_DCORE_OFFSET + inst;
7220 idle_data->tpc_fmt, dcore, inst,
7657 static void gaudi2_tpc_mmu_prepare(struct hl_device *hdev, int dcore, int inst, u32 offset,