Lines Matching defs:gaudi2
10 #include "../include/gaudi2/gaudi2_special_blocks.h"
13 #include "../include/gaudi2/gaudi2_packets.h"
14 #include "../include/gaudi2/gaudi2_reg_map.h"
15 #include "../include/gaudi2/gaudi2_async_ids_map_extended.h"
16 #include "../include/gaudi2/arc/gaudi2_arc_common_packets.h"
1850 "gaudi2 vdec 0_0", "gaudi2 vdec 0_0 abnormal",
1851 "gaudi2 vdec 0_1", "gaudi2 vdec 0_1 abnormal",
1852 "gaudi2 vdec 1_0", "gaudi2 vdec 1_0 abnormal",
1853 "gaudi2 vdec 1_1", "gaudi2 vdec 1_1 abnormal",
1854 "gaudi2 vdec 2_0", "gaudi2 vdec 2_0 abnormal",
1855 "gaudi2 vdec 2_1", "gaudi2 vdec 2_1 abnormal",
1856 "gaudi2 vdec 3_0", "gaudi2 vdec 3_0 abnormal",
1857 "gaudi2 vdec 3_1", "gaudi2 vdec 3_1 abnormal",
1858 "gaudi2 vdec s_0", "gaudi2 vdec s_0 abnormal",
1859 "gaudi2 vdec s_1", "gaudi2 vdec s_1 abnormal"
2485 struct gaudi2_device *gaudi2 = hdev->asic_specific;
2490 if ((gaudi2) && (gaudi2->dram_bar_cur_addr == addr))
2504 if (gaudi2) {
2505 old_addr = gaudi2->dram_bar_cur_addr;
2506 gaudi2->dram_bar_cur_addr = addr;
2850 struct gaudi2_device *gaudi2 = hdev->asic_specific;
2856 if (!(gaudi2->hw_cap_initialized & HW_CAP_CPU_Q))
2922 struct gaudi2_device *gaudi2 = hdev->asic_specific;
2926 if (!(gaudi2->hw_cap_initialized & HW_CAP_CPU_Q))
3042 struct gaudi2_device *gaudi2 = hdev->asic_specific;
3065 if (gaudi2_is_arc_tpc_owned(arc_id) && !(gaudi2->tpc_hw_cap_initialized &
3145 struct gaudi2_device *gaudi2 = hdev->asic_specific;
3151 gaudi2->virt_msix_db_dma_addr);
3186 static void gaudi2_user_mapped_dec_init(struct gaudi2_device *gaudi2, u32 start_idx)
3188 struct user_mapped_block *blocks = gaudi2->mapped_blocks;
3204 struct gaudi2_device *gaudi2 = hdev->asic_specific;
3205 struct user_mapped_block *blocks = gaudi2->mapped_blocks;
3260 gaudi2_user_mapped_dec_init(gaudi2, USR_MAPPED_BLK_DEC_START_IDX);
3489 struct gaudi2_device *gaudi2 = hdev->asic_specific;
3490 struct gaudi2_queues_test_info *msg_info = gaudi2->queues_test_info;
3505 struct gaudi2_device *gaudi2 = hdev->asic_specific;
3506 struct gaudi2_queues_test_info *msg_info = gaudi2->queues_test_info;
3532 struct gaudi2_device *gaudi2;
3536 gaudi2 = kzalloc(sizeof(*gaudi2), GFP_KERNEL);
3537 if (!gaudi2)
3544 if (gaudi2->num_of_valid_hw_events == GAUDI2_EVENT_SIZE) {
3551 gaudi2->hw_events[gaudi2->num_of_valid_hw_events++] = gaudi2_irq_map_table[i].fc_id;
3555 gaudi2->lfsr_rand_seeds[i] = gaudi2_get_non_zero_random_int();
3557 gaudi2->cpucp_info_get = gaudi2_cpucp_info_get;
3559 hdev->asic_specific = gaudi2;
3592 gaudi2->virt_msix_db_cpu_addr = hl_cpu_accessible_dma_pool_alloc(hdev, prop->pmmu.page_size,
3593 &gaudi2->virt_msix_db_dma_addr);
3594 if (!gaudi2->virt_msix_db_cpu_addr) {
3600 spin_lock_init(&gaudi2->hw_queues_lock);
3602 gaudi2->scratchpad_kernel_address = hl_asic_dma_alloc_coherent(hdev, PAGE_SIZE,
3603 &gaudi2->scratchpad_bus_address,
3605 if (!gaudi2->scratchpad_kernel_address) {
3643 hl_asic_dma_free_coherent(hdev, PAGE_SIZE, gaudi2->scratchpad_kernel_address,
3644 gaudi2->scratchpad_bus_address);
3646 hl_cpu_accessible_dma_pool_free(hdev, prop->pmmu.page_size, gaudi2->virt_msix_db_cpu_addr);
3655 kfree(gaudi2);
3662 struct gaudi2_device *gaudi2 = hdev->asic_specific;
3668 hl_cpu_accessible_dma_pool_free(hdev, prop->pmmu.page_size, gaudi2->virt_msix_db_cpu_addr);
3675 hl_asic_dma_free_coherent(hdev, PAGE_SIZE, gaudi2->scratchpad_kernel_address,
3676 gaudi2->scratchpad_bus_address);
3680 kfree(gaudi2);
3748 struct gaudi2_device *gaudi2 = hdev->asic_specific;
3751 if (!(gaudi2->hw_cap_initialized & HW_CAP_PDMA_MASK))
3759 if (!(gaudi2->hw_cap_initialized & HW_CAP_EDMA_MASK))
3767 if (!(gaudi2->hw_cap_initialized & BIT_ULL(HW_CAP_EDMA_SHIFT + seq)))
3781 struct gaudi2_device *gaudi2 = hdev->asic_specific;
3787 if (!(gaudi2->hw_cap_initialized & BIT_ULL(HW_CAP_MME_SHIFT + i)))
3796 struct gaudi2_device *gaudi2 = hdev->asic_specific;
3800 if (!(gaudi2->tpc_hw_cap_initialized & HW_CAP_TPC_MASK))
3804 if (!(gaudi2->tpc_hw_cap_initialized & BIT_ULL(HW_CAP_TPC_SHIFT + i)))
3814 struct gaudi2_device *gaudi2 = hdev->asic_specific;
3818 if (!(gaudi2->hw_cap_initialized & HW_CAP_ROT_MASK))
3822 if (!(gaudi2->hw_cap_initialized & BIT_ULL(HW_CAP_ROT_SHIFT + i)))
3832 struct gaudi2_device *gaudi2 = hdev->asic_specific;
3836 if (!(gaudi2->nic_hw_cap_initialized & HW_CAP_NIC_MASK))
3860 struct gaudi2_device *gaudi2 = hdev->asic_specific;
3863 if (!(gaudi2->hw_cap_initialized & HW_CAP_PDMA_MASK))
3870 if (!(gaudi2->hw_cap_initialized & HW_CAP_EDMA_MASK))
3878 if (!(gaudi2->hw_cap_initialized & BIT_ULL(HW_CAP_EDMA_SHIFT + seq)))
3892 struct gaudi2_device *gaudi2 = hdev->asic_specific;
3898 if (gaudi2->hw_cap_initialized & BIT_ULL(HW_CAP_MME_SHIFT + i))
3904 struct gaudi2_device *gaudi2 = hdev->asic_specific;
3908 if (!(gaudi2->tpc_hw_cap_initialized & HW_CAP_TPC_MASK))
3912 if (!(gaudi2->tpc_hw_cap_initialized & BIT_ULL(HW_CAP_TPC_SHIFT + i)))
3922 struct gaudi2_device *gaudi2 = hdev->asic_specific;
3926 if (!(gaudi2->hw_cap_initialized & HW_CAP_ROT_MASK))
3934 if (!(gaudi2->hw_cap_initialized & BIT_ULL(HW_CAP_ROT_SHIFT + i)))
3948 struct gaudi2_device *gaudi2 = hdev->asic_specific;
3951 if (!(gaudi2->hw_cap_initialized & HW_CAP_PDMA_MASK))
3958 if (!(gaudi2->hw_cap_initialized & HW_CAP_EDMA_MASK))
3966 if (!(gaudi2->hw_cap_initialized & BIT_ULL(HW_CAP_EDMA_SHIFT + seq)))
3980 struct gaudi2_device *gaudi2 = hdev->asic_specific;
3986 if (gaudi2->hw_cap_initialized & BIT_ULL(HW_CAP_MME_SHIFT + i))
3992 struct gaudi2_device *gaudi2 = hdev->asic_specific;
3996 if (!(gaudi2->tpc_hw_cap_initialized & HW_CAP_TPC_MASK))
4000 if (!(gaudi2->tpc_hw_cap_initialized & BIT_ULL(HW_CAP_TPC_SHIFT + i)))
4010 struct gaudi2_device *gaudi2 = hdev->asic_specific;
4014 if (!(gaudi2->hw_cap_initialized & HW_CAP_ROT_MASK))
4018 if (!(gaudi2->hw_cap_initialized & BIT_ULL(HW_CAP_ROT_SHIFT + i)))
4028 struct gaudi2_device *gaudi2 = hdev->asic_specific;
4032 if (!(gaudi2->nic_hw_cap_initialized & HW_CAP_NIC_MASK))
4069 return "gaudi2 cpu eq";
4071 return "gaudi2 completion";
4075 return "gaudi2 tpc assert";
4077 return "gaudi2 unexpected error";
4079 return "gaudi2 user completion";
4152 struct gaudi2_device *gaudi2 = hdev->asic_specific;
4156 if (gaudi2->hw_cap_initialized & HW_CAP_MSIX)
4222 gaudi2->hw_cap_initialized |= HW_CAP_MSIX;
4256 struct gaudi2_device *gaudi2 = hdev->asic_specific;
4260 if (!(gaudi2->hw_cap_initialized & HW_CAP_MSIX))
4286 struct gaudi2_device *gaudi2 = hdev->asic_specific;
4290 if (!(gaudi2->hw_cap_initialized & HW_CAP_MSIX))
4319 gaudi2->hw_cap_initialized &= ~HW_CAP_MSIX;
4404 struct gaudi2_device *gaudi2 = hdev->asic_specific;
4407 if ((gaudi2->dec_hw_cap_initialized & HW_CAP_DEC_MASK) == 0)
4468 struct gaudi2_device *gaudi2 = hdev->asic_specific;
4471 if (!gaudi2)
4481 struct gaudi2_device *gaudi2 = hdev->asic_specific;
4485 if (!(gaudi2->nic_hw_cap_initialized & HW_CAP_NIC_MASK))
4526 struct gaudi2_device *gaudi2 = hdev->asic_specific;
4529 if (!(gaudi2->tpc_hw_cap_initialized & HW_CAP_TPC_MASK))
4533 if (!(gaudi2->tpc_hw_cap_initialized & BIT_ULL(HW_CAP_TPC_SHIFT + tpc_id)))
4553 struct gaudi2_device *gaudi2 = hdev->asic_specific;
4557 if (!(gaudi2->hw_cap_initialized & BIT_ULL(HW_CAP_MME_SHIFT + mme_id)))
4571 struct gaudi2_device *gaudi2 = hdev->asic_specific;
4574 if (!(gaudi2->hw_cap_initialized & HW_CAP_EDMA_MASK))
4578 if (!(gaudi2->hw_cap_initialized & BIT_ULL(HW_CAP_EDMA_SHIFT + edma_id)))
4752 struct gaudi2_device *gaudi2 = hdev->asic_specific;
4758 if (gaudi2->hw_cap_initialized & HW_CAP_CPU)
4765 gaudi2->hw_cap_initialized |= HW_CAP_CPU;
4774 struct gaudi2_device *gaudi2 = hdev->asic_specific;
4783 if (gaudi2->hw_cap_initialized & HW_CAP_CPU_Q)
4835 gaudi2->hw_cap_initialized |= HW_CAP_CPU_Q;
4884 struct gaudi2_device *gaudi2 = hdev->asic_specific;
4895 lower_32_bits(gaudi2->scratchpad_bus_address));
4897 upper_32_bits(gaudi2->scratchpad_bus_address));
5042 struct gaudi2_device *gaudi2 = hdev->asic_specific;
5045 if ((gaudi2->hw_cap_initialized & HW_CAP_KDMA) == HW_CAP_KDMA)
5052 gaudi2->hw_cap_initialized |= HW_CAP_KDMA;
5057 struct gaudi2_device *gaudi2 = hdev->asic_specific;
5060 if ((gaudi2->hw_cap_initialized & HW_CAP_PDMA_MASK) == HW_CAP_PDMA_MASK)
5075 gaudi2->hw_cap_initialized |= HW_CAP_PDMA_MASK;
5095 struct gaudi2_device *gaudi2 = hdev->asic_specific;
5098 if ((gaudi2->hw_cap_initialized & HW_CAP_EDMA_MASK) == HW_CAP_EDMA_MASK)
5110 gaudi2->hw_cap_initialized |= BIT_ULL(HW_CAP_EDMA_SHIFT + seq);
5134 struct gaudi2_device *gaudi2 = hdev->asic_specific;
5186 addr = gaudi2->virt_msix_db_dma_addr;
5220 struct gaudi2_device *gaudi2 = hdev->asic_specific;
5237 WREG32(mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_L_0, lower_32_bits(gaudi2->virt_msix_db_dma_addr));
5238 WREG32(mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_H_0, upper_32_bits(gaudi2->virt_msix_db_dma_addr));
5263 struct gaudi2_device *gaudi2 = hdev->asic_specific;
5279 WREG32(reg_base + MME_ACC_AP_LFSR_SEED_WDATA_OFFSET, gaudi2->lfsr_rand_seeds[i]);
5317 struct gaudi2_device *gaudi2 = hdev->asic_specific;
5320 if ((gaudi2->hw_cap_initialized & HW_CAP_MME_MASK) == HW_CAP_MME_MASK)
5326 gaudi2->hw_cap_initialized |= BIT_ULL(HW_CAP_MME_SHIFT + i);
5347 struct gaudi2_device *gaudi2 = hdev->asic_specific;
5363 gaudi2->tpc_hw_cap_initialized |= BIT_ULL(HW_CAP_TPC_SHIFT + seq);
5368 struct gaudi2_device *gaudi2 = hdev->asic_specific;
5375 if ((gaudi2->tpc_hw_cap_initialized & HW_CAP_TPC_MASK) == HW_CAP_TPC_MASK)
5389 struct gaudi2_device *gaudi2 = hdev->asic_specific;
5398 gaudi2->hw_cap_initialized |= BIT_ULL(HW_CAP_ROT_SHIFT + i);
5421 struct gaudi2_device *gaudi2 = hdev->asic_specific;
5428 if ((gaudi2->dec_hw_cap_initialized & HW_CAP_DEC_MASK) == HW_CAP_DEC_MASK)
5445 gaudi2->dec_hw_cap_initialized |= BIT_ULL(HW_CAP_DEC_SHIFT + dec_bit);
5458 gaudi2->dec_hw_cap_initialized |= BIT_ULL(HW_CAP_DEC_SHIFT + dec_bit);
5556 struct gaudi2_device *gaudi2 = hdev->asic_specific;
5561 if (gaudi2->hw_cap_initialized & hw_cap)
5664 struct gaudi2_device *gaudi2 = hdev->asic_specific;
5674 if ((flags & MMU_OP_USERPTR) && (gaudi2->hw_cap_initialized & HW_CAP_PMMU)) {
5691 struct gaudi2_device *gaudi2 = hdev->asic_specific;
5705 if ((flags & MMU_OP_USERPTR) && (gaudi2->hw_cap_initialized & HW_CAP_PMMU)) {
5809 struct gaudi2_device *gaudi2 = hdev->asic_specific;
5813 if (gaudi2->hw_cap_initialized & HW_CAP_PMMU)
5852 gaudi2->hw_cap_initialized |= HW_CAP_PMMU;
5861 struct gaudi2_device *gaudi2 = hdev->asic_specific;
5873 if ((gaudi2->hw_cap_initialized & hw_cap) || !(prop->hmmu_hif_enabled_mask & BIT(dmmu_seq)))
5904 gaudi2->hw_cap_initialized |= hw_cap;
5940 struct gaudi2_device *gaudi2 = hdev->asic_specific;
5958 gaudi2->dram_bar_cur_addr = DRAM_PHYS_BASE;
5984 rc = gaudi2->cpucp_info_get(hdev);
6040 struct gaudi2_device *gaudi2 = hdev->asic_specific;
6059 if (gaudi2 && (gaudi2->hw_cap_initialized & HW_CAP_CPU) &&
6219 struct gaudi2_device *gaudi2 = hdev->asic_specific;
6286 if (!gaudi2)
6289 gaudi2->dec_hw_cap_initialized &= ~(HW_CAP_DEC_MASK);
6290 gaudi2->tpc_hw_cap_initialized &= ~(HW_CAP_TPC_MASK);
6297 gaudi2->nic_hw_cap_initialized &= ~(HW_CAP_NIC_MASK);
6300 gaudi2->hw_cap_initialized &=
6307 memset(gaudi2->events_stat, 0, sizeof(gaudi2->events_stat));
6309 gaudi2->hw_cap_initialized &=
6362 struct gaudi2_device *gaudi2 = hdev->asic_specific;
6413 return !!(gaudi2->tpc_hw_cap_initialized & BIT_ULL(0));
6444 return !!(gaudi2->nic_hw_cap_initialized & BIT_ULL(0));
6448 return !!(gaudi2->hw_cap_initialized & HW_CAP_CPU_Q);
6455 return !!(gaudi2->tpc_hw_cap_initialized & BIT_ULL(hw_tpc_cap_bit));
6458 return !!(gaudi2->nic_hw_cap_initialized & BIT_ULL(hw_nic_cap_bit));
6463 return !!(gaudi2->hw_cap_initialized & hw_cap_mask);
6468 struct gaudi2_device *gaudi2 = hdev->asic_specific;
6473 return !!(gaudi2->active_hw_arc & BIT_ULL(arc_id));
6476 return !!(gaudi2->active_tpc_arc & BIT_ULL(arc_id - CPU_ID_TPC_QMAN_ARC0));
6479 return !!(gaudi2->active_nic_arc & BIT_ULL(arc_id - CPU_ID_NIC_QMAN_ARC0));
6488 struct gaudi2_device *gaudi2 = hdev->asic_specific;
6493 gaudi2->active_hw_arc &= ~(BIT_ULL(arc_id));
6497 gaudi2->active_tpc_arc &= ~(BIT_ULL(arc_id - CPU_ID_TPC_QMAN_ARC0));
6501 gaudi2->active_nic_arc &= ~(BIT_ULL(arc_id - CPU_ID_NIC_QMAN_ARC0));
6511 struct gaudi2_device *gaudi2 = hdev->asic_specific;
6516 gaudi2->active_hw_arc |= BIT_ULL(arc_id);
6520 gaudi2->active_tpc_arc |= BIT_ULL(arc_id - CPU_ID_TPC_QMAN_ARC0);
6524 gaudi2->active_nic_arc |= BIT_ULL(arc_id - CPU_ID_NIC_QMAN_ARC0);
6587 struct gaudi2_device *gaudi2 = hdev->asic_specific;
6589 if (!(gaudi2->hw_cap_initialized & HW_CAP_CPU_Q)) {
6647 struct gaudi2_device *gaudi2 = hdev->asic_specific;
6668 if ((gaudi2->hw_cap_initialized & HW_CAP_DMMU_MASK) &&
6675 if (gaudi2->hw_cap_initialized & HW_CAP_PMMU) {
6703 struct gaudi2_device *gaudi2 = hdev->asic_specific;
6708 if (!(gaudi2->hw_cap_initialized & HW_CAP_PMMU)) {
6718 struct gaudi2_device *gaudi2 = hdev->asic_specific;
6720 if (!(gaudi2->hw_cap_initialized & HW_CAP_CPU_Q))
6938 struct gaudi2_device *gaudi2 = hdev->asic_specific;
6944 if (!(gaudi2->hw_cap_initialized & HW_CAP_CPU_Q))
6952 struct gaudi2_device *gaudi2 = hdev->asic_specific;
6962 msg_info = &gaudi2->queues_test_info[i - GAUDI2_QUEUE_ID_PDMA_0_0];
6994 struct gaudi2_device *gaudi2 = hdev->asic_specific;
7009 irq_arr_size = gaudi2->num_of_valid_hw_events * sizeof(gaudi2->hw_events[0]);
7010 return hl_fw_unmask_irq_arr(hdev, gaudi2->hw_events, irq_arr_size);
7377 __acquires(&gaudi2->hw_queues_lock)
7379 struct gaudi2_device *gaudi2 = hdev->asic_specific;
7381 spin_lock(&gaudi2->hw_queues_lock);
7385 __releases(&gaudi2->hw_queues_lock)
7387 struct gaudi2_device *gaudi2 = hdev->asic_specific;
7389 spin_unlock(&gaudi2->hw_queues_lock);
7399 struct gaudi2_device *gaudi2 = hdev->asic_specific;
7401 if (!(gaudi2->hw_cap_initialized & HW_CAP_CPU_Q))
7414 struct gaudi2_device *gaudi2 = hdev->asic_specific;
7417 *size = (u32) sizeof(gaudi2->events_stat_aggregate);
7418 return gaudi2->events_stat_aggregate;
7421 *size = (u32) sizeof(gaudi2->events_stat);
7422 return gaudi2->events_stat;
7671 struct gaudi2_device *gaudi2 = hdev->asic_specific;
7684 if (!(gaudi2->hw_cap_initialized & HW_CAP_MMU_MASK))
9465 struct gaudi2_device *gaudi2 = hdev->asic_specific;
9480 gaudi2->events_stat[event_type]++;
9481 gaudi2->events_stat_aggregate[event_type]++;
10399 struct gaudi2_device *gaudi2 = hdev->asic_specific;
10402 if (!(gaudi2->hw_cap_initialized & HW_CAP_PMMU))
10470 struct gaudi2_device *gaudi2 = hdev->asic_specific;
10472 if (!(gaudi2->hw_cap_initialized & HW_CAP_PMMU))
10497 struct gaudi2_device *gaudi2 = hdev->asic_specific;
10501 gaudi2->virt_msix_db_dma_addr, prop->pmmu.page_size, true);
10855 struct gaudi2_device *gaudi2 = hdev->asic_specific;
10859 if (block_addr == CFG_BASE + gaudi2->mapped_blocks[i].address) {
10862 *block_size = gaudi2->mapped_blocks[i].size;
10875 struct gaudi2_device *gaudi2 = hdev->asic_specific;
10886 if (block_size != gaudi2->mapped_blocks[block_id].size) {
10891 offset_in_bar = CFG_BASE + gaudi2->mapped_blocks[block_id].address - STM_FLASH_BASE_ADDR;
10908 struct gaudi2_device *gaudi2 = hdev->asic_specific;
10913 if (gaudi2->hw_cap_initialized & HW_CAP_CPU_Q)
10982 struct gaudi2_device *gaudi2 = hdev->asic_specific;
10985 if (!(gaudi2->hw_cap_initialized & mmu_id))
11140 struct gaudi2_device *gaudi2 = hdev->asic_specific;
11142 if (!(gaudi2->hw_cap_initialized & HW_CAP_CPU_Q))