Lines Matching defs:base
2524 * fetch BAR physical base address
5962 * base address of dram
5965 dev_err(hdev->dev, "failed to map HBM bar to DRAM base address\n");
8043 /* Find router mstr_if register base */
8138 u32 axuser_xy, u32 *base, u16 *eng_id,
8150 base[num_of_eng] = razwi_info[i].rtr_ctrl;
8169 u32 base[PSOC_RAZWI_MAX_ENG_PER_RTR];
8177 axuser_xy, base, eng_id, eng_name_str);
8184 axuser_xy, base, eng_id,
8189 if (RREG32(base[i] + DEC_RAZWI_HBW_AW_SET)) {
8190 addr_hi = RREG32(base[i] + DEC_RAZWI_HBW_AW_ADDR_HI);
8191 addr_lo = RREG32(base[i] + DEC_RAZWI_HBW_AW_ADDR_LO);
8203 if (RREG32(base[i] + DEC_RAZWI_HBW_AR_SET)) {
8204 addr_hi = RREG32(base[i] + DEC_RAZWI_HBW_AR_ADDR_HI);
8205 addr_lo = RREG32(base[i] + DEC_RAZWI_HBW_AR_ADDR_LO);
8217 if (RREG32(base[i] + DEC_RAZWI_LBW_AW_SET)) {
8218 addr_lo = RREG32(base[i] + DEC_RAZWI_LBW_AW_ADDR);
8229 if (RREG32(base[i] + DEC_RAZWI_LBW_AR_SET)) {
8230 addr_lo = RREG32(base[i] + DEC_RAZWI_LBW_AR_ADDR);
10265 u64 block_base = cfg_ctx->base + block_idx * cfg_ctx->block_off;
10605 ctl |= FIELD_PREP(GAUDI2_PKT_SHORT_CTL_BASE_MASK, 1); /* SOB base */
10623 ctl |= FIELD_PREP(GAUDI2_PKT_SHORT_CTL_BASE_MASK, 0); /* MON base */
10653 ctl |= FIELD_PREP(GAUDI2_PKT_SHORT_CTL_BASE_MASK, 0); /* MON base */
10831 u32 base = 0, dcore_id, dec_id;
10842 base = mmDCORE0_DEC0_CMD_BASE + dcore_id * DCORE_OFFSET +
10846 base = mmPCIE_DEC0_CMD_BASE + ((core_id % 8) * PCIE_VDEC_OFFSET);
10849 return base;