Lines Matching refs:device
52 * - Clear SRAM on context switch (happens on context switch when device is
1674 * initialize the ASID one time during device initialization with the fixed value of 1
1700 * The device CPU works with 40-bits addresses, while bit 39 must be set
1854 /* Allocate device structure */
3797 * The device CPU works with 40 bits addresses.
3888 /* Perform read from the device to make sure device is up */
3900 * configuration was set in the device
3929 * Before pushing u-boot/linux to device, need to set the hbm bar to
3988 /* Perform read from the device to flush all configuration */
4034 /* Set device to handle FLR by H/W as we will put the device CPU to
4041 /* If linux is loaded in the device CPU we need to communicate with it
4134 dev_err(hdev->dev, "Timeout while waiting for device to reset 0x%x\n", status);
4514 /* make sure device CPU will read latest data from host */
4542 /* Shift to the device's base physical address of host memory */
4552 /* Cancel the device's base physical address of host memory */
4816 /* Shift to the device's base physical address of host memory */
4826 /* Cancel the device's base physical address of host memory */
6795 * @hdev: pointer to the habanalabs device structure
6830 * @hdev: pointer to the habanalabs device structure
6907 * @hdev: pointer to the habanalabs device structure
7336 static int gaudi_hbm_read_interrupts(struct hl_device *hdev, int device,
7366 device, ch, wr_par, rd_par, ca_par, serr, derr);
7369 device, ch, hbm_ecc_data->first_addr, type,
7380 base = GAUDI_HBM_CFG_BASE + device * GAUDI_HBM_CFG_OFFSET;
7388 device, ch * 2, val & 0x1, (val >> 1) & 0x1,
7395 device, ch * 2,
7408 device, ch * 2 + 1, val & 0x1, (val >> 1) & 0x1,
7415 device, ch * 2 + 1,
7437 device, val, val2);
7445 device, val, val2);
7865 /* notify on device unavailable while the reset triggered by fw */
8168 return hdev->pdev->device;
9089 static ssize_t infineon_ver_show(struct device *dev, struct device_attribute *attr, char *buf)