Lines Matching defs:addr
479 static int gaudi_memset_device_memory(struct hl_device *hdev, u64 addr,
723 static u64 gaudi_set_hbm_bar_base(struct hl_device *hdev, u64 addr)
727 u64 old_addr = addr;
730 if ((gaudi) && (gaudi->hbm_bar_cur_addr == addr))
739 pci_region.addr = addr;
746 gaudi->hbm_bar_cur_addr = addr;
764 inbound_region.addr = SRAM_BASE_ADDR;
772 inbound_region.addr = SPI_FLASH_BASE_ADDR;
780 inbound_region.addr = DRAM_PHYS_BASE;
786 outbound_region.addr = HOST_PHYS_BASE;
3656 "failed to set hop0 addr for asid %d\n", i);
4624 u64 addr, size, val = hdev->memory_scrub_val;
4641 addr = prop->sram_user_base_address;
4645 addr, addr + size, val);
4646 rc = gaudi_memset_device_memory(hdev, addr, size, val);
4742 fence_pkt->addr = cpu_to_le64(fence_dma_addr);
4849 dma_addr_t addr, addr_next;
4855 addr = sg_dma_address(sg);
4868 if ((addr + len == addr_next) &&
4887 u64 addr, enum dma_data_direction dir)
4892 if (hl_userptr_is_pinned(hdev, addr, le32_to_cpu(user_dma_pkt->tsize),
4900 rc = hl_pin_host_memory(hdev, addr, le32_to_cpu(user_dma_pkt->tsize),
4937 u64 addr;
4950 addr = le64_to_cpu(user_dma_pkt->src_addr);
4954 addr = (le64_to_cpu(user_dma_pkt->dst_addr) &
4963 addr, dir);
5137 u64 device_memory_addr, addr;
5153 addr = le64_to_cpu(user_dma_pkt->src_addr);
5159 addr = le64_to_cpu(user_dma_pkt->dst_addr);
5165 (!hl_userptr_is_pinned(hdev, addr,
5169 addr, user_dma_pkt->tsize);
5551 cq_pkt->addr = cpu_to_le64(cq_addr);
5560 cq_pkt->addr = cpu_to_le64(CFG_BASE + msi_addr);
5568 static int gaudi_memset_device_memory(struct hl_device *hdev, u64 addr,
5593 lin_dma_pkt->dst_addr |= cpu_to_le64(addr);
5678 pkt->addr = cpu_to_le64(reg_base + (i * 4));
5863 u64 addr = hdev->asic_prop.mmu_pgt_addr;
5868 return gaudi_memset_device_memory(hdev, addr, size, 0);
5876 static int gaudi_dma_core_transfer(struct hl_device *hdev, int dma_id, u64 addr,
5885 WREG32(mmDMA0_CORE_SRC_BASE_LO + dma_offset, lower_32_bits(addr));
5886 WREG32(mmDMA0_CORE_SRC_BASE_HI + dma_offset, upper_32_bits(addr));
5904 dma_id, addr);
5923 static int gaudi_debugfs_read_dma(struct hl_device *hdev, u64 addr, u32 size,
5996 rc = gaudi_dma_core_transfer(hdev, dma_id, addr, size_to_dma,
6007 addr += SZ_2M;
6028 static u64 gaudi_read_pte(struct hl_device *hdev, u64 addr)
6036 (addr - gaudi->hbm_bar_cur_addr));
6039 static void gaudi_write_pte(struct hl_device *hdev, u64 addr, u64 val)
6047 (addr - gaudi->hbm_bar_cur_addr));
6381 fence_pkt->addr = cpu_to_le64(fence_dma_addr);
6665 static void gaudi_print_and_get_mmu_error_info(struct hl_device *hdev, u64 *addr, u64 *event_mask)
6675 *addr = val & MMU_UP_PAGE_ERROR_CAPTURE_VA_49_32_MASK;
6676 *addr <<= 32;
6677 *addr |= RREG32(mmMMU_UP_PAGE_ERROR_CAPTURE_VA);
6679 dev_err_ratelimited(hdev->dev, "MMU page fault on va 0x%llx\n", *addr);
6680 hl_handle_page_fault(hdev, *addr, 0, true, event_mask);
6687 *addr = val & MMU_UP_ACCESS_ERROR_CAPTURE_VA_49_32_MASK;
6688 *addr <<= 32;
6689 *addr |= RREG32(mmMMU_UP_ACCESS_ERROR_CAPTURE_VA);
6691 dev_err_ratelimited(hdev->dev, "MMU access error on va 0x%llx\n", *addr);
6817 dev_info(hdev->dev, "stop on err: stream: %u, addr: %#llx, size: %u\n",
6844 u64 pq_ci, addr[PQ_FETCHER_CACHE_SIZE];
6865 memset(addr, 0, sizeof(addr));
6879 addr[i] = le64_to_cpu(bd->ptr);
6881 dev_info(hdev->dev, "stop on err PQE(stream %u): ci: %u, addr: %#llx, size: %u\n",
6882 stream, ci, addr[i], len);
6897 memcpy(undef_opcode->cb_addr_streams[arr_idx], addr, sizeof(addr));
8477 u16 addr)
8483 ctl = FIELD_PREP(GAUDI_PKT_SHORT_CTL_ADDR_MASK, addr);
8566 static int gaudi_get_fence_addr(struct hl_device *hdev, u32 queue_id, u64 *addr)
8683 *addr = CFG_BASE + offset;