Lines Matching refs:props
272 base_addr = sds->props[SP_SYNC_OBJ_BASE_ADDR] +
273 sds->props[SP_NEXT_SYNC_OBJ_ADDR] * index;
275 sync_objects = vmalloc(sds->props[SP_SYNC_OBJ_AMOUNT] * sizeof(u32));
279 for (i = 0; i < sds->props[SP_SYNC_OBJ_AMOUNT]; ++i)
332 for (i = 0; i < sds->props[SP_SYNC_OBJ_AMOUNT]; ++i) {
339 sync_object_addr = sds->props[SP_SYNC_OBJ_BASE_ADDR] +
340 sds->props[SP_NEXT_SYNC_OBJ_ADDR] * index +
423 for (index = 0; index < sds->props[SP_NUM_CORES]; ++index) {
456 monitors = vmalloc(sds->props[SP_MONITORS_AMOUNT] *
461 base_addr = sds->props[SP_NEXT_SYNC_OBJ_ADDR] * index;
463 for (i = 0; i < sds->props[SP_MONITORS_AMOUNT]; ++i) {
466 RREG32(base_addr + sds->props[SP_MON_OBJ_WR_ADDR_LOW] +
470 RREG32(base_addr + sds->props[SP_MON_OBJ_WR_ADDR_HIGH] +
474 RREG32(base_addr + sds->props[SP_MON_OBJ_WR_DATA] +
478 RREG32(base_addr + sds->props[SP_MON_OBJ_ARM_DATA] +
482 RREG32(base_addr + sds->props[SP_MON_OBJ_STATUS] +
533 for (i = 0; i < sds->props[SP_MONITORS_AMOUNT]; ++i) {
582 for (index = 0; index < sds->props[SP_NUM_CORES]; ++index) {
614 n_fences = sds->props[SP_NUM_OF_TPC_ENGINES];
615 base_addr = sds->props[SP_TPC0_CMDQ];
616 next_fence = sds->props[SP_NEXT_TPC];
619 n_fences = sds->props[SP_NUM_OF_MME_ENGINES];
620 base_addr = sds->props[SP_MME_CMDQ];
621 next_fence = sds->props[SP_NEXT_MME];
624 n_fences = sds->props[SP_NUM_OF_DMA_ENGINES];
625 base_addr = sds->props[SP_DMA_CMDQ];
626 next_fence = sds->props[SP_DMA_QUEUES_OFFSET];
635 sds->props[SP_FENCE0_CNT_OFFSET],
637 sds->props[SP_CP_STS_OFFSET],