Lines Matching refs:value
345 int hl_fw_send_pci_access_msg(struct hl_device *hdev, u32 opcode, u64 value)
350 pkt.value = cpu_to_le64(value);
388 /* set fence to a non valid value */
473 * previous PI value written during packet submission.
474 * We must do this or else F/W can read an old value upon queue wraparound.
498 pkt.value = cpu_to_le64(event_type);
558 test_pkt.value = cpu_to_le64(CPUCP_PACKET_FENCE_VAL);
615 pkt.value = cpu_to_le64(open);
632 hb_pkt.value = cpu_to_le64(CPUCP_PACKET_FENCE_VAL);
1340 pkt.value = cpu_to_le64(asid);
1531 * In the first read of this register we store the value of this
1534 * In case it is not enabled the stored value will be left 0- all
1729 * @status: value of FW status register
2198 * in addition, as the descriptor value is going to be over-ridden by new data- we mark it
3090 long value;
3101 value = hl_fw_get_frequency(hdev, hdev->asic_prop.clk_pll_index, false);
3103 if (value < 0) {
3104 dev_err(hdev->dev, "Failed to retrieve device max clock %ld\n", value);
3105 return value;
3108 *max_clk = (value / 1000 / 1000);
3110 value = hl_fw_get_frequency(hdev, hdev->asic_prop.clk_pll_index, true);
3112 if (value < 0) {
3113 dev_err(hdev->dev, "Failed to retrieve device current clock %ld\n", value);
3114 return value;
3117 *cur_clk = (value / 1000 / 1000);
3168 pkt.value = cpu_to_le64(freq);
3209 pkt.value = cpu_to_le64(hdev->max_power);