Lines Matching refs:EMIT2
68 #define EMIT2(b1, b2) EMIT((b1) + ((b2) << 8), 2)
76 do { EMIT2(b1, b2); EMIT(off, 4); } while (0)
215 EMIT2(0x33, add_2reg(0xC0, IA32_EAX, IA32_EAX));
225 EMIT2(0x33, add_2reg(0xC0, dst, dst));
249 EMIT2(0x89, add_2reg(0xC0, dst, sreg));
301 EMIT2(0x8B, add_2reg(0xC0, dst, IA32_EAX));
304 EMIT2(0xF7, add_1reg(0xE0, sreg));
312 EMIT2(0x89, add_2reg(0xC0, dst, IA32_EAX));
338 EMIT2(0x0F, 0xB7);
342 EMIT2(0x33, add_2reg(0xC0, dreg_hi, dreg_hi));
347 EMIT2(0x33, add_2reg(0xC0, dreg_hi, dreg_hi));
386 EMIT2(0x0F, 0xB7);
391 EMIT2(0x33, add_2reg(0xC0, dreg_hi, dreg_hi));
400 EMIT2(0x33, add_2reg(0xC0, dreg_hi, dreg_hi));
412 EMIT2(0x89, add_2reg(0xC0, IA32_ECX, dreg_hi));
414 EMIT2(0x89, add_2reg(0xC0, dreg_hi, dreg_lo));
416 EMIT2(0x89, add_2reg(0xC0, dreg_lo, IA32_ECX));
447 EMIT2(0x8B, add_2reg(0xC0, src, IA32_ECX));
455 EMIT2(0x8B, add_2reg(0xC0, dst, IA32_EAX));
458 EMIT2(0x31, add_2reg(0xC0, IA32_EDX, IA32_EDX));
460 EMIT2(0xF7, add_1reg(0xF0, IA32_ECX));
467 EMIT2(0x89, add_2reg(0xC0, dst, IA32_EDX));
473 EMIT2(0x89, add_2reg(0xC0, dst, IA32_EAX));
499 EMIT2(0x8B, add_2reg(0xC0, src, IA32_ECX));
511 EMIT2(0xD3, add_1reg(b2, dreg));
544 EMIT2(0x11, add_2reg(0xC0, dreg, sreg));
546 EMIT2(0x01, add_2reg(0xC0, dreg, sreg));
551 EMIT2(0x19, add_2reg(0xC0, dreg, sreg));
553 EMIT2(0x29, add_2reg(0xC0, dreg, sreg));
557 EMIT2(0x09, add_2reg(0xC0, dreg, sreg));
561 EMIT2(0x21, add_2reg(0xC0, dreg, sreg));
565 EMIT2(0x31, add_2reg(0xC0, dreg, sreg));
621 EMIT2(0x11, add_2reg(0xC0, dreg, sreg));
626 EMIT2(0x01, add_2reg(0xC0, dreg, sreg));
635 EMIT2(0x19, add_2reg(0xC0, dreg, sreg));
640 EMIT2(0x29, add_2reg(0xC0, dreg, sreg));
648 EMIT2(0x09, add_2reg(0xC0, dreg, sreg));
655 EMIT2(0x21, add_2reg(0xC0, dreg, sreg));
662 EMIT2(0x31, add_2reg(0xC0, dreg, sreg));
665 EMIT2(0xF7, add_1reg(0xD8, dreg));
713 EMIT2(0xF7, add_1reg(0xD8, dreg_lo));
717 EMIT2(0xF7, add_1reg(0xD8, dreg_hi));
752 EMIT2(0x8B, add_2reg(0xC0, src_lo, IA32_ECX));
757 EMIT2(0xD3, add_1reg(0xE0, dreg_lo));
764 EMIT2(IA32_JB, 4);
767 EMIT2(0x89, add_2reg(0xC0, dreg_hi, dreg_lo));
769 EMIT2(0x33, add_2reg(0xC0, dreg_lo, dreg_lo));
805 EMIT2(0x8B, add_2reg(0xC0, src_lo, IA32_ECX));
810 EMIT2(0xD3, add_1reg(0xF8, dreg_hi));
817 EMIT2(IA32_JB, 5);
820 EMIT2(0x89, add_2reg(0xC0, dreg_lo, dreg_hi));
858 EMIT2(0x8B, add_2reg(0xC0, src_lo, IA32_ECX));
863 EMIT2(0xD3, add_1reg(0xE8, dreg_hi));
870 EMIT2(IA32_JB, 4);
873 EMIT2(0x89, add_2reg(0xC0, dreg_lo, dreg_hi));
875 EMIT2(0x33, add_2reg(0xC0, dreg_hi, dreg_hi));
916 EMIT2(0x89, add_2reg(0xC0, dreg_hi, dreg_lo));
918 EMIT2(0x33, add_2reg(0xC0, dreg_lo, dreg_lo));
921 EMIT2(0x33, add_2reg(0xC0, dreg_lo, dreg_lo));
923 EMIT2(0x33, add_2reg(0xC0, dreg_hi, dreg_hi));
965 EMIT2(0x89, add_2reg(0xC0, dreg_lo, dreg_hi));
967 EMIT2(0x33, add_2reg(0xC0, dreg_hi, dreg_hi));
970 EMIT2(0x33, add_2reg(0xC0, dreg_lo, dreg_lo));
972 EMIT2(0x33, add_2reg(0xC0, dreg_hi, dreg_hi));
1013 EMIT2(0x89, add_2reg(0xC0, dreg_lo, dreg_hi));
1021 EMIT2(0x89, add_2reg(0xC0, dreg_lo, dreg_hi));
1047 EMIT2(0x8B, add_2reg(0xC0, dst_hi, IA32_EAX));
1054 EMIT2(0xF7, add_1reg(0xE0, src_lo));
1057 EMIT2(0x89, add_2reg(0xC0, IA32_ECX, IA32_EAX));
1065 EMIT2(0x8B, add_2reg(0xC0, dst_lo, IA32_EAX));
1072 EMIT2(0xF7, add_1reg(0xE0, src_hi));
1075 EMIT2(0x01, add_2reg(0xC0, IA32_ECX, IA32_EAX));
1083 EMIT2(0x8B, add_2reg(0xC0, dst_lo, IA32_EAX));
1090 EMIT2(0xF7, add_1reg(0xE0, src_lo));
1093 EMIT2(0x01, add_2reg(0xC0, IA32_ECX, IA32_EDX));
1104 EMIT2(0x89, add_2reg(0xC0, dst_lo, IA32_EAX));
1106 EMIT2(0x89, add_2reg(0xC0, dst_hi, IA32_ECX));
1127 EMIT2(0xF7, add_1reg(0xE0, dst_hi));
1130 EMIT2(0x89, add_2reg(0xC0, IA32_ECX, IA32_EAX));
1139 EMIT2(0xF7, add_1reg(0xE0, dst_lo));
1141 EMIT2(0x01, add_2reg(0xC0, IA32_ECX, IA32_EAX));
1150 EMIT2(0xF7, add_1reg(0xE0, dst_lo));
1153 EMIT2(0x01, add_2reg(0xC0, IA32_ECX, IA32_EDX));
1164 EMIT2(0x89, add_2reg(0xC0, dst_lo, IA32_EAX));
1166 EMIT2(0x89, add_2reg(0xC0, dst_hi, IA32_ECX));
1212 EMIT2(0x89, 0xE5);
1225 EMIT2(0x31, add_2reg(0xC0, IA32_EBX, IA32_EBX));
1279 EMIT2(0xFF, 0xE2);
1323 EMIT2(IA32_JBE, jmp_label(jmp_label1, 2));
1336 EMIT2(IA32_JNE, 3);
1341 EMIT2(IA32_JAE, jmp_label(jmp_label1, 2));
1362 EMIT2(0x85, add_2reg(0xC0, IA32_EDX, IA32_EDX));
1364 EMIT2(IA32_JE, jmp_label(jmp_label1, 2));
1922 EMIT2(0x8B, add_2reg(0xC0, dst_lo, IA32_EAX));
1928 EMIT2(0x66, 0xC7); break;
1935 EMIT2(add_1reg(0x40, IA32_EAX), insn->off);
1962 EMIT2(0x8B, add_2reg(0xC0, dst_lo, IA32_EAX));
1970 EMIT2(0x8B, add_2reg(0xC0, src_lo, IA32_EDX));
1976 EMIT2(0x66, 0x89); break;
1983 EMIT2(add_2reg(0x40, IA32_EAX, IA32_EDX),
1997 EMIT2(0x8B, add_2reg(0xC0, src_hi,
2001 EMIT2(add_2reg(0x40, IA32_EAX,
2023 EMIT2(0x8B, add_2reg(0xC0, src_lo, IA32_EAX));
2027 EMIT2(0x0F, 0xB6); break;
2029 EMIT2(0x0F, 0xB7); break;
2036 EMIT2(add_2reg(0x40, IA32_EAX, IA32_EDX),
2048 EMIT2(0x89, add_2reg(0xC0, dst_lo, IA32_EDX));
2061 EMIT2(0x33,
2075 EMIT2(0x89,
2189 EMIT2(0x39, add_2reg(0xC0, dreg_hi, sreg_hi));
2190 EMIT2(IA32_JNE, 2);
2193 EMIT2(0x39, add_2reg(0xC0, dreg_lo, sreg_lo));
2224 EMIT2(0x39, add_2reg(0xC0, dreg_hi, sreg_hi));
2225 EMIT2(IA32_JNE, 10);
2227 EMIT2(0x39, add_2reg(0xC0, dreg_lo, sreg_lo));
2248 EMIT2(0x89, add_2reg(0xC0, dreg_lo, dst_lo));
2251 EMIT2(0x89,
2265 EMIT2(0x23, add_2reg(0xC0, sreg_lo, dreg_lo));
2268 EMIT2(0x23, add_2reg(0xC0, sreg_hi, dreg_hi));
2270 EMIT2(0x09, add_2reg(0xC0, dreg_lo, dreg_hi));
2293 EMIT2(0x89, add_2reg(0xC0, dreg_lo, dst_lo));
2296 EMIT2(0x89,
2304 EMIT2(0x23, add_2reg(0xC0, sreg_lo, dreg_lo));
2310 EMIT2(0x23, add_2reg(0xC0, sreg_hi, dreg_hi));
2312 EMIT2(0x09, add_2reg(0xC0, dreg_lo, dreg_hi));
2356 EMIT2(0x39, add_2reg(0xC0, dreg_hi, sreg_hi));
2357 EMIT2(IA32_JNE, 2);
2360 EMIT2(0x39, add_2reg(0xC0, dreg_lo, sreg_lo));
2367 EMIT2(jmp_cond, jmp_offset);
2401 EMIT2(0x39, add_2reg(0xC0, dreg_hi, sreg_hi));
2402 EMIT2(IA32_JNE, 10);
2404 EMIT2(0x39, add_2reg(0xC0, dreg_lo, sreg_lo));
2421 EMIT2(0xEB, 6);
2453 EMIT2(0xEB, jmp_offset);