Lines Matching defs:EMIT3
69 #define EMIT3(b1, b2, b3) EMIT((b1) + ((b2) << 8) + ((b3) << 16), 3)
78 do { EMIT3(b1, b2, b3); EMIT(off, 4); } while (0)
217 EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_EAX),
243 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), STACK_VAR(src));
246 EMIT3(0x89, add_2reg(0x40, IA32_EBP, sreg), STACK_VAR(dst));
294 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_ECX), STACK_VAR(src));
298 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), STACK_VAR(dst));
308 EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_EAX),
327 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX),
329 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EDX),
356 EMIT3(0x89, add_2reg(0x40, IA32_EBP, dreg_lo),
359 EMIT3(0x89, add_2reg(0x40, IA32_EBP, dreg_hi),
375 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX),
377 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EDX),
384 EMIT3(0xC1, add_1reg(0xC8, dreg_lo), 8);
422 EMIT3(0x89, add_2reg(0x40, IA32_EBP, dreg_lo),
425 EMIT3(0x89, add_2reg(0x40, IA32_EBP, dreg_hi),
443 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_ECX),
451 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX),
464 EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_EDX),
470 EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_EAX),
492 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), STACK_VAR(dst));
496 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_ECX), STACK_VAR(src));
515 EMIT3(0x89, add_2reg(0x40, IA32_EBP, dreg), STACK_VAR(dst));
534 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), STACK_VAR(src));
538 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EDX), STACK_VAR(dst));
571 EMIT3(0x89, add_2reg(0x40, IA32_EBP, dreg),
608 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), STACK_VAR(dst));
619 EMIT3(0x83, add_1reg(0xD0, dreg), val);
624 EMIT3(0x83, add_1reg(0xC0, dreg), val);
633 EMIT3(0x83, add_1reg(0xD8, dreg), val);
638 EMIT3(0x83, add_1reg(0xE8, dreg), val);
646 EMIT3(0x83, add_1reg(0xC8, dreg), val);
653 EMIT3(0x83, add_1reg(0xE0, dreg), val);
660 EMIT3(0x83, add_1reg(0xF0, dreg), val);
671 EMIT3(0x89, add_2reg(0x40, IA32_EBP, dreg),
706 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX),
708 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EDX),
715 EMIT3(0x83, add_1reg(0xD0, dreg_hi), 0x00);
721 EMIT3(0x89, add_2reg(0x40, IA32_EBP, dreg_lo),
724 EMIT3(0x89, add_2reg(0x40, IA32_EBP, dreg_hi),
740 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX),
742 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EDX),
748 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_ECX),
755 EMIT3(0x0F, 0xA5, add_2reg(0xC0, dreg_hi, dreg_lo));
762 EMIT3(0x83, add_1reg(0xF8, IA32_ECX), 32);
773 EMIT3(0x89, add_2reg(0x40, IA32_EBP, dreg_lo),
776 EMIT3(0x89, add_2reg(0x40, IA32_EBP, dreg_hi),
793 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX),
795 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EDX),
801 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_ECX),
808 EMIT3(0x0F, 0xAD, add_2reg(0xC0, dreg_lo, dreg_hi));
815 EMIT3(0x83, add_1reg(0xF8, IA32_ECX), 32);
822 EMIT3(0xC1, add_1reg(0xF8, dreg_hi), 31);
826 EMIT3(0x89, add_2reg(0x40, IA32_EBP, dreg_lo),
829 EMIT3(0x89, add_2reg(0x40, IA32_EBP, dreg_hi),
846 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX),
848 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EDX),
854 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_ECX),
861 EMIT3(0x0F, 0xAD, add_2reg(0xC0, dreg_lo, dreg_hi));
868 EMIT3(0x83, add_1reg(0xF8, IA32_ECX), 32);
879 EMIT3(0x89, add_2reg(0x40, IA32_EBP, dreg_lo),
882 EMIT3(0x89, add_2reg(0x40, IA32_EBP, dreg_hi),
899 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX),
901 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EDX),
909 EMIT3(0xC1, add_1reg(0xE0, dreg_lo), val);
914 EMIT3(0xC1, add_1reg(0xE0, dreg_lo), value);
928 EMIT3(0x89, add_2reg(0x40, IA32_EBP, dreg_lo),
931 EMIT3(0x89, add_2reg(0x40, IA32_EBP, dreg_hi),
947 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX),
949 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EDX),
958 EMIT3(0xC1, add_1reg(0xE8, dreg_hi), val);
963 EMIT3(0xC1, add_1reg(0xE8, dreg_hi), value);
977 EMIT3(0x89, add_2reg(0x40, IA32_EBP, dreg_lo),
980 EMIT3(0x89, add_2reg(0x40, IA32_EBP, dreg_hi),
996 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX),
998 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EDX),
1006 EMIT3(0xC1, add_1reg(0xF8, dreg_hi), val);
1011 EMIT3(0xC1, add_1reg(0xF8, dreg_hi), value);
1016 EMIT3(0xC1, add_1reg(0xF8, dreg_hi), 31);
1019 EMIT3(0xC1, add_1reg(0xF8, dreg_hi), 31);
1026 EMIT3(0x89, add_2reg(0x40, IA32_EBP, dreg_lo),
1029 EMIT3(0x89, add_2reg(0x40, IA32_EBP, dreg_hi),
1043 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX),
1051 EMIT3(0xF7, add_1reg(0x60, IA32_EBP), STACK_VAR(src_lo));
1061 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX),
1069 EMIT3(0xF7, add_1reg(0x60, IA32_EBP), STACK_VAR(src_hi));
1079 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX),
1087 EMIT3(0xF7, add_1reg(0x60, IA32_EBP), STACK_VAR(src_lo));
1097 EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_EAX),
1100 EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_ECX),
1124 EMIT3(0xF7, add_1reg(0x60, IA32_EBP), STACK_VAR(dst_hi));
1136 EMIT3(0xF7, add_1reg(0x60, IA32_EBP), STACK_VAR(dst_lo));
1147 EMIT3(0xF7, add_1reg(0x60, IA32_EBP), STACK_VAR(dst_lo));
1157 EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_EAX),
1160 EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_ECX),
1223 EMIT3(0x83, add_1reg(0xE8, IA32_EBP), SCRATCH_SIZE + 12);
1228 EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_EBP), STACK_VAR(fplo));
1229 EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_EBX), STACK_VAR(fphi));
1233 EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_EAX), STACK_VAR(r1[0]));
1234 EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_EBX), STACK_VAR(r1[1]));
1237 EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_EBX), STACK_VAR(tcc[0]));
1238 EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_EBX), STACK_VAR(tcc[1]));
1252 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), STACK_VAR(r0[0]));
1254 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EDX), STACK_VAR(r0[1]));
1257 EMIT3(0x83, add_1reg(0xC0, IA32_EBP), SCRATCH_SIZE + 12);
1260 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EBX), -12);
1262 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_ESI), -8);
1264 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EDI), -4);
1315 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), STACK_VAR(r2[0]));
1317 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EDX), STACK_VAR(r3[0]));
1320 EMIT3(0x39, add_2reg(0x40, IA32_EAX, IA32_EDX),
1331 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_ECX), STACK_VAR(tcc[0]));
1332 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EBX), STACK_VAR(tcc[1]));
1335 EMIT3(0x83, add_1reg(0xF8, IA32_EBX), hi);
1338 EMIT3(0x83, add_1reg(0xF8, IA32_ECX), lo);
1344 EMIT3(0x83, add_1reg(0xC0, IA32_ECX), 0x01);
1346 EMIT3(0x83, add_1reg(0xD0, IA32_EBX), 0x00);
1349 EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_ECX), STACK_VAR(tcc[0]));
1351 EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_EBX), STACK_VAR(tcc[1]));
1368 EMIT3(0x8B, add_2reg(0x40, IA32_EDX, IA32_EDX),
1371 EMIT3(0x83, add_1reg(0xC0, IA32_EDX), PROLOGUE_SIZE);
1374 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), STACK_VAR(r1[0]));
1397 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_ECX), STACK_VAR(src_hi));
1402 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_ECX), STACK_VAR(src_lo));
1415 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_ECX), STACK_VAR(src_lo));
1611 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, *cur_arg_reg++),
1615 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, *cur_arg_reg++),
1642 EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_EAX),
1647 EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_EDX),
1652 EMIT3(0x83, add_1reg(0xC0, IA32_ESP), bytes_in_stack);
1909 EMIT3(0x0F, 0xAE, 0xE8);
1918 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX),
1958 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX),
1966 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EDX),
1992 EMIT3(0x8B, add_2reg(0x40, IA32_EBP,
2019 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX),
2044 EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_EDX),
2056 EMIT3(0xC7, add_1reg(0x40, IA32_EBP),
2070 EMIT3(0x89,
2116 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX),
2119 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EDX),
2130 EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_EAX),
2133 EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_EDX),
2137 EMIT3(0x83, add_1reg(0xC0, IA32_ESP), 32);
2168 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX),
2171 EMIT3(0x8B,
2178 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_ECX),
2181 EMIT3(0x8B,
2206 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX),
2208 EMIT3(0x8B,
2215 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_ECX),
2217 EMIT3(0x8B,
2239 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX),
2242 EMIT3(0x8B,
2256 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_ECX),
2259 EMIT3(0x8B,
2284 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX),
2287 EMIT3(0x8B,
2340 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX),
2343 EMIT3(0x8B,
2387 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX),
2389 EMIT3(0x8B,