Lines Matching refs:insn
13 #include <asm/insn.h>
14 #include <asm/insn-eval.h>
19 #define pr_fmt(fmt) "insn: " fmt
30 * @insn: Instruction containing the opcode to inspect
38 static bool is_string_insn(struct insn *insn)
41 if (insn->opcode.nbytes != 1)
44 switch (insn->opcode.bytes[0]) {
56 * @insn: Instruction containing the prefix to inspect
62 bool insn_has_rep_prefix(struct insn *insn)
67 insn_get_prefixes(insn);
69 for_each_insn_prefix(insn, i, p) {
79 * @insn: Valid instruction with segment override prefixes
81 * Inspect the instruction prefixes in @insn and find segment overrides, if any.
91 static int get_seg_reg_override_idx(struct insn *insn)
97 insn_get_prefixes(insn);
100 for_each_insn_prefix(insn, i, p) {
142 * @insn: Valid instruction with segment override prefixes
154 static bool check_seg_overrides(struct insn *insn, int regoff)
156 if (regoff == offsetof(struct pt_regs, di) && is_string_insn(insn))
164 * @insn: Instruction with opcode and address size. Must be valid.
179 static int resolve_default_seg(struct insn *insn, struct pt_regs *regs, int off)
201 /* Need insn to verify address size. */
202 if (insn->addr_bytes == 2)
213 if (is_string_insn(insn))
231 * @insn: Instruction with operands
236 * applicable, prefixes and the instruction pointed by @insn.
264 * index based on the instruction, its operands and prefixes. Hence, @insn
266 * @insn at all as in this case CS is used in all cases. This case is checked
281 static int resolve_seg_reg(struct insn *insn, struct pt_regs *regs, int regoff)
298 if (!insn)
301 if (!check_seg_overrides(insn, regoff))
302 return resolve_default_seg(insn, regs, regoff);
304 idx = get_seg_reg_override_idx(insn);
309 return resolve_default_seg(insn, regs, regoff);
447 static int get_regno(struct insn *insn, enum reg_type type)
456 if (IS_ENABLED(CONFIG_X86_64) && !insn->x86_64)
461 regno = X86_MODRM_RM(insn->modrm.value);
467 if (!X86_MODRM_MOD(insn->modrm.value) && regno == 5)
470 if (X86_REX_B(insn->rex_prefix.value))
475 regno = X86_MODRM_REG(insn->modrm.value);
477 if (X86_REX_R(insn->rex_prefix.value))
482 regno = X86_SIB_INDEX(insn->sib.value);
483 if (X86_REX_X(insn->rex_prefix.value))
492 if (X86_MODRM_MOD(insn->modrm.value) != 3 && regno == 4)
497 regno = X86_SIB_BASE(insn->sib.value);
503 if (!X86_MODRM_MOD(insn->modrm.value) && regno == 5)
506 if (X86_REX_B(insn->rex_prefix.value))
522 static int get_reg_offset(struct insn *insn, struct pt_regs *regs,
525 int regno = get_regno(insn, type);
535 * @insn: Instruction containing ModRM byte
541 * in @insn. This function is to be used with 16-bit address encodings. The
550 static int get_reg_offset_16(struct insn *insn, struct pt_regs *regs,
584 if (X86_MODRM_MOD(insn->modrm.value) == 3) {
585 *offs1 = insn_get_modrm_rm_off(insn, regs);
590 *offs1 = regoff1[X86_MODRM_RM(insn->modrm.value)];
591 *offs2 = regoff2[X86_MODRM_RM(insn->modrm.value)];
600 if ((X86_MODRM_MOD(insn->modrm.value) == 0) &&
601 (X86_MODRM_RM(insn->modrm.value) == 6))
845 * @insn: Instruction containing the ModRM byte
855 int insn_get_modrm_rm_off(struct insn *insn, struct pt_regs *regs)
857 return get_reg_offset(insn, regs, REG_TYPE_RM);
862 * @insn: Instruction containing the ModRM byte
870 int insn_get_modrm_reg_off(struct insn *insn, struct pt_regs *regs)
872 return get_reg_offset(insn, regs, REG_TYPE_REG);
877 * @insn: Instruction containing the ModRM byte
885 unsigned long *insn_get_modrm_reg_ptr(struct insn *insn, struct pt_regs *regs)
889 offset = insn_get_modrm_reg_off(insn, regs);
897 * @insn: Instruction. Must be valid.
904 * @regoff and, if any or allowed, override prefixes in @insn. This function is
916 static int get_seg_base_limit(struct insn *insn, struct pt_regs *regs,
925 seg_reg_idx = resolve_seg_reg(insn, regs, regoff);
945 * @insn: Instruction. Must be valid.
966 static int get_eff_addr_reg(struct insn *insn, struct pt_regs *regs,
971 ret = insn_get_modrm(insn);
975 if (X86_MODRM_MOD(insn->modrm.value) != 3)
978 *regoff = get_reg_offset(insn, regs, REG_TYPE_RM);
983 if (insn->addr_bytes == 2)
985 else if (insn->addr_bytes == 4)
995 * @insn: Instruction. Must be valid.
1000 * Obtain the effective address referenced by the ModRM byte of @insn. After
1015 static int get_eff_addr_modrm(struct insn *insn, struct pt_regs *regs,
1021 if (insn->addr_bytes != 8 && insn->addr_bytes != 4)
1024 ret = insn_get_modrm(insn);
1028 if (X86_MODRM_MOD(insn->modrm.value) > 2)
1031 *regoff = get_reg_offset(insn, regs, REG_TYPE_RM);
1040 tmp = regs->ip + insn->length;
1049 if (insn->addr_bytes == 4) {
1050 int addr32 = (int)(tmp & 0xffffffff) + insn->displacement.value;
1054 *eff_addr = tmp + insn->displacement.value;
1062 * @insn: Instruction. Must be valid.
1067 * Obtain the 16-bit effective address referenced by the ModRM byte of @insn.
1082 static int get_eff_addr_modrm_16(struct insn *insn, struct pt_regs *regs,
1088 if (insn->addr_bytes != 2)
1091 insn_get_modrm(insn);
1093 if (!insn->modrm.nbytes)
1096 if (X86_MODRM_MOD(insn->modrm.value) > 2)
1099 ret = get_reg_offset_16(insn, regs, &addr_offset1, &addr_offset2);
1114 displacement = insn->displacement.value & 0xffff;
1130 * @insn: Instruction. Must be valid.
1135 * Obtain the effective address referenced by the SIB byte of @insn. After
1150 static int get_eff_addr_sib(struct insn *insn, struct pt_regs *regs,
1157 if (insn->addr_bytes != 8 && insn->addr_bytes != 4)
1160 ret = insn_get_modrm(insn);
1164 if (!insn->modrm.nbytes)
1167 if (X86_MODRM_MOD(insn->modrm.value) > 2)
1170 ret = insn_get_sib(insn);
1174 if (!insn->sib.nbytes)
1177 *base_offset = get_reg_offset(insn, regs, REG_TYPE_BASE);
1178 indx_offset = get_reg_offset(insn, regs, REG_TYPE_INDEX);
1199 if (insn->addr_bytes == 4) {
1205 addr32 = base32 + idx32 * (1 << X86_SIB_SCALE(insn->sib.value));
1206 addr32 += insn->displacement.value;
1210 *eff_addr = base + indx * (1 << X86_SIB_SCALE(insn->sib.value));
1211 *eff_addr += insn->displacement.value;
1219 * @insn: Instruction containing ModRM byte and displacement
1225 * @insn or the default segment of the registers involved in the address
1234 static void __user *get_addr_ref_16(struct insn *insn, struct pt_regs *regs)
1241 if (insn_get_displacement(insn))
1244 if (insn->addr_bytes != 2)
1247 if (X86_MODRM_MOD(insn->modrm.value) == 3) {
1248 ret = get_eff_addr_reg(insn, regs, ®off, &tmp);
1254 ret = get_eff_addr_modrm_16(insn, regs, ®off, &eff_addr);
1259 ret = get_seg_base_limit(insn, regs, regoff, &seg_base, &seg_limit);
1284 * @insn: Instruction with ModRM, SIB bytes and displacement
1298 static void __user *get_addr_ref_32(struct insn *insn, struct pt_regs *regs)
1305 if (insn->addr_bytes != 4)
1308 if (X86_MODRM_MOD(insn->modrm.value) == 3) {
1309 ret = get_eff_addr_reg(insn, regs, ®off, &tmp);
1316 if (insn->sib.nbytes) {
1317 ret = get_eff_addr_sib(insn, regs, ®off, &tmp);
1323 ret = get_eff_addr_modrm(insn, regs, ®off, &tmp);
1331 ret = get_seg_base_limit(insn, regs, regoff, &seg_base, &seg_limit);
1373 * @insn: Instruction struct with ModRM and SIB bytes and displacement
1387 static void __user *get_addr_ref_64(struct insn *insn, struct pt_regs *regs)
1392 static void __user *get_addr_ref_64(struct insn *insn, struct pt_regs *regs)
1398 if (insn->addr_bytes != 8)
1401 if (X86_MODRM_MOD(insn->modrm.value) == 3) {
1402 ret = get_eff_addr_reg(insn, regs, ®off, &eff_addr);
1407 if (insn->sib.nbytes) {
1408 ret = get_eff_addr_sib(insn, regs, ®off, &eff_addr);
1412 ret = get_eff_addr_modrm(insn, regs, ®off, &eff_addr);
1419 ret = get_seg_base_limit(insn, regs, regoff, &seg_base, NULL);
1432 * @insn: Instruction structure containing ModRM byte and displacement
1445 void __user *insn_get_addr_ref(struct insn *insn, struct pt_regs *regs)
1447 if (!insn || !regs)
1450 if (insn_get_opcode(insn))
1453 switch (insn->addr_bytes) {
1455 return get_addr_ref_16(insn, regs);
1457 return get_addr_ref_32(insn, regs);
1459 return get_addr_ref_64(insn, regs);
1543 * @insn: Structure to store decoded instruction
1549 * insn. Also determines the correct address and operand sizes.
1555 bool insn_decode_from_regs(struct insn *insn, struct pt_regs *regs,
1560 insn_init(insn, buf, buf_size, user_64bit_mode(regs));
1576 insn->addr_bytes = INSN_CODE_SEG_ADDR_SZ(seg_defs);
1577 insn->opnd_bytes = INSN_CODE_SEG_OPND_SZ(seg_defs);
1579 if (insn_get_length(insn))
1582 if (buf_size < insn->length)
1590 * @insn: Structure to store decoded instruction
1600 enum insn_mmio_type insn_decode_mmio(struct insn *insn, int *bytes)
1606 if (insn_get_opcode(insn))
1609 switch (insn->opcode.bytes[0]) {
1615 *bytes = insn->opnd_bytes;
1624 *bytes = insn->opnd_bytes;
1633 *bytes = insn->opnd_bytes;
1642 *bytes = insn->opnd_bytes;
1647 switch (insn->opcode.bytes[1]) {