Lines Matching defs:msr
174 static inline struct kvm_pmc *get_fw_gp_pmc(struct kvm_pmu *pmu, u32 msr)
179 return get_gp_pmc(pmu, msr, MSR_IA32_PMC0);
200 static bool intel_is_valid_msr(struct kvm_vcpu *vcpu, u32 msr)
206 switch (msr) {
221 ret = get_gp_pmc(pmu, msr, MSR_IA32_PERFCTR0) ||
222 get_gp_pmc(pmu, msr, MSR_P6_EVNTSEL0) ||
223 get_fixed_pmc(pmu, msr) || get_fw_gp_pmc(pmu, msr) ||
224 intel_pmu_is_valid_lbr_msr(vcpu, msr);
231 static struct kvm_pmc *intel_msr_idx_to_pmc(struct kvm_vcpu *vcpu, u32 msr)
236 pmc = get_fixed_pmc(pmu, msr);
237 pmc = pmc ? pmc : get_gp_pmc(pmu, msr, MSR_P6_EVNTSEL0);
238 pmc = pmc ? pmc : get_gp_pmc(pmu, msr, MSR_IA32_PERFCTR0);
325 * host at the time the value is read from the msr, and this avoids the
352 u32 msr = msr_info->index;
354 switch (msr) {
368 if ((pmc = get_gp_pmc(pmu, msr, MSR_IA32_PERFCTR0)) ||
369 (pmc = get_gp_pmc(pmu, msr, MSR_IA32_PMC0))) {
374 } else if ((pmc = get_fixed_pmc(pmu, msr))) {
379 } else if ((pmc = get_gp_pmc(pmu, msr, MSR_P6_EVNTSEL0))) {
395 u32 msr = msr_info->index;
399 switch (msr) {
430 if ((pmc = get_gp_pmc(pmu, msr, MSR_IA32_PERFCTR0)) ||
431 (pmc = get_gp_pmc(pmu, msr, MSR_IA32_PMC0))) {
432 if ((msr & MSR_PMC_FULL_WIDTH_BIT) &&
437 !(msr & MSR_PMC_FULL_WIDTH_BIT))
442 } else if ((pmc = get_fixed_pmc(pmu, msr))) {
446 } else if ((pmc = get_gp_pmc(pmu, msr, MSR_P6_EVNTSEL0))) {