Lines Matching refs:save
342 svm->vmcb->save.efer = efer | EFER_SVME;
398 old_rflags = svm->vmcb->save.rflags;
404 svm->vmcb->save.rflags = old_rflags;
453 svm->soft_int_csbase = svm->vmcb->save.cs.base;
821 * save it.
825 * save it.
1001 to_vmcb->save.dbgctl = from_vmcb->save.dbgctl;
1002 to_vmcb->save.br_from = from_vmcb->save.br_from;
1003 to_vmcb->save.br_to = from_vmcb->save.br_to;
1004 to_vmcb->save.last_excp_from = from_vmcb->save.last_excp_from;
1005 to_vmcb->save.last_excp_to = from_vmcb->save.last_excp_to;
1058 bool enable_lbrv = (svm_get_lbr_vmcb(svm)->save.dbgctl & DEBUGCTLMSR_LBR) ||
1078 svm->vmcb->save.rflags &= ~X86_EFLAGS_TF;
1080 svm->vmcb->save.rflags &= ~X86_EFLAGS_RF;
1249 struct vmcb_save_area *save = &vmcb->save;
1316 init_seg(&save->es);
1317 init_seg(&save->ss);
1318 init_seg(&save->ds);
1319 init_seg(&save->fs);
1320 init_seg(&save->gs);
1322 save->cs.selector = 0xf000;
1323 save->cs.base = 0xffff0000;
1325 save->cs.attrib = SVM_SELECTOR_READ_MASK | SVM_SELECTOR_P_MASK |
1327 save->cs.limit = 0xffff;
1329 save->gdtr.base = 0;
1330 save->gdtr.limit = 0xffff;
1331 save->idtr.base = 0;
1332 save->idtr.limit = 0xffff;
1334 init_sys_seg(&save->ldtr, SEG_TYPE_LDT);
1335 init_sys_seg(&save->tr, SEG_TYPE_BUSY_TSS16);
1344 save->g_pat = vcpu->arch.pat;
1345 save->cr3 = 0;
1536 * or subsequent vmload of host save area.
1552 * because TSC_AUX is restored on #VMEXIT from the host save area
1595 unsigned long rflags = svm->vmcb->save.rflags;
1617 to_svm(vcpu)->vmcb->save.rflags = rflags;
1662 * Requesting an interrupt window if save.RFLAGS.IF=0 is pointless as
1703 struct vmcb_save_area *save = &to_svm(vcpu)->vmcb->save;
1704 struct vmcb_save_area *save01 = &to_svm(vcpu)->vmcb01.ptr->save;
1707 case VCPU_SREG_CS: return &save->cs;
1708 case VCPU_SREG_DS: return &save->ds;
1709 case VCPU_SREG_ES: return &save->es;
1712 case VCPU_SREG_SS: return &save->ss;
1791 var->dpl = to_svm(vcpu)->vmcb->save.cpl;
1798 struct vmcb_save_area *save = &to_svm(vcpu)->vmcb->save;
1800 return save->cpl;
1816 dt->size = svm->vmcb->save.idtr.limit;
1817 dt->address = svm->vmcb->save.idtr.base;
1824 svm->vmcb->save.idtr.limit = dt->size;
1825 svm->vmcb->save.idtr.base = dt->address ;
1833 dt->size = svm->vmcb->save.gdtr.limit;
1834 dt->address = svm->vmcb->save.gdtr.base;
1841 svm->vmcb->save.gdtr.limit = dt->size;
1842 svm->vmcb->save.gdtr.base = dt->address ;
1854 * VMCB save area now, since the save area will become the initial
1855 * contents of the VMSA, and future VMCB save area updates won't be
1859 svm->vmcb->save.cr3 = cr3;
1880 svm->vmcb->save.efer |= EFER_LMA | EFER_LME;
1886 svm->vmcb->save.efer &= ~(EFER_LMA | EFER_LME);
1906 svm->vmcb->save.cr0 = hcr0;
1947 to_svm(vcpu)->vmcb->save.cr4 = cr4;
1980 svm->vmcb->save.cpl = (var->dpl & 3);
2017 if (unlikely(value != vmcb->save.dr6)) {
2018 vmcb->save.dr6 = value;
2035 * We cannot reset svm->vmcb->save.dr6 to DR6_ACTIVE_LOW here,
2038 vcpu->arch.dr6 = svm->vmcb->save.dr6;
2039 vcpu->arch.dr7 = svm->vmcb->save.dr7;
2051 svm->vmcb->save.dr7 = value;
2090 u32 payload = svm->vmcb->save.dr6 ^ DR6_ACTIVE_LOW;
2104 kvm_run->debug.arch.dr6 = svm->vmcb->save.dr6;
2105 kvm_run->debug.arch.dr7 = svm->vmcb->save.dr7;
2107 svm->vmcb->save.cs.base + svm->vmcb->save.rip;
2121 kvm_run->debug.arch.pc = svm->vmcb->save.cs.base + svm->vmcb->save.rip;
2208 * The VM save area has already been encrypted so it
2280 ret = kvm_vcpu_map(vcpu, gpa_to_gfn(svm->vmcb->save.rax), &map);
2413 if (svm->vmcb->save.rax & ~PAGE_MASK)
2490 trace_kvm_invlpga(to_svm(vcpu)->vmcb->save.rip, asid, gva);
2500 trace_kvm_skinit(to_svm(vcpu)->vmcb->save.rip, kvm_rax_read(vcpu));
2856 msr_info->data = svm->vmcb01.ptr->save.star;
2860 msr_info->data = svm->vmcb01.ptr->save.lstar;
2863 msr_info->data = svm->vmcb01.ptr->save.cstar;
2866 msr_info->data = svm->vmcb01.ptr->save.kernel_gs_base;
2869 msr_info->data = svm->vmcb01.ptr->save.sfmask;
2873 msr_info->data = svm->vmcb01.ptr->save.sysenter_cs;
2876 msr_info->data = (u32)svm->vmcb01.ptr->save.sysenter_eip;
2881 msr_info->data = svm->vmcb01.ptr->save.sysenter_esp;
2889 msr_info->data = svm_get_lbr_vmcb(svm)->save.dbgctl;
2892 msr_info->data = svm_get_lbr_vmcb(svm)->save.br_from;
2895 msr_info->data = svm_get_lbr_vmcb(svm)->save.br_to;
2898 msr_info->data = svm_get_lbr_vmcb(svm)->save.last_excp_from;
2901 msr_info->data = svm_get_lbr_vmcb(svm)->save.last_excp_to;
2915 msr_info->data = svm->vmcb->save.spec_ctrl;
3033 svm->vmcb01.ptr->save.g_pat = data;
3047 svm->vmcb->save.spec_ctrl = data;
3077 svm->vmcb01.ptr->save.star = data;
3081 svm->vmcb01.ptr->save.lstar = data;
3084 svm->vmcb01.ptr->save.cstar = data;
3087 svm->vmcb01.ptr->save.kernel_gs_base = data;
3090 svm->vmcb01.ptr->save.sfmask = data;
3094 svm->vmcb01.ptr->save.sysenter_cs = data;
3097 svm->vmcb01.ptr->save.sysenter_eip = (u32)data;
3108 svm->vmcb01.ptr->save.sysenter_esp = (u32)data;
3116 * from the host save area (which has been initialized in
3143 svm_get_lbr_vmcb(svm)->save.dbgctl = data;
3334 struct vmcb_save_area *save = &svm->vmcb->save;
3335 struct vmcb_save_area *save01 = &svm->vmcb01.ptr->save;
3384 save->es.selector, save->es.attrib,
3385 save->es.limit, save->es.base);
3388 save->cs.selector, save->cs.attrib,
3389 save->cs.limit, save->cs.base);
3392 save->ss.selector, save->ss.attrib,
3393 save->ss.limit, save->ss.base);
3396 save->ds.selector, save->ds.attrib,
3397 save->ds.limit, save->ds.base);
3408 save->gdtr.selector, save->gdtr.attrib,
3409 save->gdtr.limit, save->gdtr.base);
3416 save->idtr.selector, save->idtr.attrib,
3417 save->idtr.limit, save->idtr.base);
3423 save->vmpl, save->cpl, save->efer);
3425 "cr0:", save->cr0, "cr2:", save->cr2);
3427 "cr3:", save->cr3, "cr4:", save->cr4);
3429 "dr6:", save->dr6, "dr7:", save->dr7);
3431 "rip:", save->rip, "rflags:", save->rflags);
3433 "rsp:", save->rsp, "rax:", save->rax);
3445 "gpat:", save->g_pat, "dbgctl:", save->dbgctl);
3447 "br_from:", save->br_from, "br_to:", save->br_to);
3449 "excp_from:", save->last_excp_from,
3450 "excp_to:", save->last_excp_to);
3517 vcpu->arch.cr0 = svm->vmcb->save.cr0;
3519 vcpu->arch.cr3 = svm->vmcb->save.cr3;
3789 ? !(svm->vmcb01.ptr->save.rflags & X86_EFLAGS_IF)
3895 svm->vmcb->save.rflags |= (X86_EFLAGS_TF | X86_EFLAGS_RF);
4136 svm->vmcb->save.rax = vcpu->arch.regs[VCPU_REGS_RAX];
4137 svm->vmcb->save.rsp = vcpu->arch.regs[VCPU_REGS_RSP];
4138 svm->vmcb->save.rip = vcpu->arch.regs[VCPU_REGS_RIP];
4164 svm->vmcb->save.cr2 = vcpu->arch.cr2;
4197 vcpu->arch.cr2 = svm->vmcb->save.cr2;
4198 vcpu->arch.regs[VCPU_REGS_RAX] = svm->vmcb->save.rax;
4199 vcpu->arch.regs[VCPU_REGS_RSP] = svm->vmcb->save.rsp;
4200 vcpu->arch.regs[VCPU_REGS_RIP] = svm->vmcb->save.rip;
4278 svm->vmcb->save.cr3 = cr3;
4624 svm->vmcb->save.rax = vcpu->arch.regs[VCPU_REGS_RAX];
4625 svm->vmcb->save.rsp = vcpu->arch.regs[VCPU_REGS_RSP];
4626 svm->vmcb->save.rip = vcpu->arch.regs[VCPU_REGS_RIP];
4635 * be lost. Temporary save non-VMLOAD/VMSAVE state to the host save
4637 * format of the area is identical to guest save area offsetted
4640 * L1 hypervisor to save additional host context (e.g. KVM does
4647 BUILD_BUG_ON(offsetof(struct vmcb, save) != 0x400);
4650 &svm->vmcb01.ptr->save);
4693 svm_copy_vmrun_state(&svm->vmcb01.ptr->save, map_save.hva + 0x400);
4703 nested_copy_vmcb_save_to_cache(svm, &vmcb12->save);