Lines Matching defs:val
488 u64 val;
494 val = native_read_msr_safe(MSR_AMD64_DC_CFG, &err);
498 val |= (1ULL << 47);
500 low = lower_32_bits(val);
501 high = upper_32_bits(val);
2620 unsigned long val)
2631 val &= ~SVM_CR0_SELECTIVE_MASK;
2633 if (cr0 ^ val) {
2647 unsigned long val;
2665 val = kvm_register_read(vcpu, reg);
2666 trace_kvm_cr_write(cr, val);
2669 if (!check_selective_cr0_intercepted(vcpu, val))
2670 err = kvm_set_cr0(vcpu, val);
2676 err = kvm_set_cr3(vcpu, val);
2679 err = kvm_set_cr4(vcpu, val);
2682 err = kvm_set_cr8(vcpu, val);
2692 val = kvm_read_cr0(vcpu);
2695 val = vcpu->arch.cr2;
2698 val = kvm_read_cr3(vcpu);
2701 val = kvm_read_cr4(vcpu);
2704 val = kvm_get_cr8(vcpu);
2711 kvm_register_write(vcpu, reg, val);
2712 trace_kvm_cr_read(cr, val);
2756 unsigned long val;
2784 val = kvm_register_read(vcpu, reg);
2785 err = kvm_set_dr(vcpu, dr, val);
2787 kvm_get_dr(vcpu, dr, &val);
2788 kvm_register_write(vcpu, reg, val);
4462 unsigned long cr0, val;
4476 val = info->src_val & ~SVM_CR0_SELECTIVE_MASK;
4480 val &= 0xfUL;
4483 val |= X86_CR0_PE;
4486 if (cr0 ^ val)