Lines Matching defs:base
228 BUILD_MMU_ROLE_ACCESSOR(base, cr0, wp);
234 BUILD_MMU_ROLE_ACCESSOR(base, efer, nx);
239 return mmu->cpu_role.base.level > 0;
244 return !mmu->cpu_role.base.has_4_byte_gpte;
2369 vcpu->arch.mmu->cpu_role.base.level < PT64_ROOT_4LEVEL &&
3788 if (mmu->cpu_role.base.level == PT32E_ROOT_LEVEL) {
3812 if (mmu->cpu_role.base.level >= PT64_ROOT_4LEVEL) {
3851 if (mmu->cpu_role.base.level == PT32E_ROOT_LEVEL) {
3865 quadrant = (mmu->cpu_role.base.level == PT32_ROOT_LEVEL) ? i : 0;
3901 mmu->cpu_role.base.level >= PT64_ROOT_4LEVEL ||
4006 if (vcpu->arch.mmu->cpu_role.base.level >= PT64_ROOT_4LEVEL) {
4499 gfn_t base = gfn_round_for_level(fault->gfn,
4502 if (kvm_mtrr_check_gfn_range_consistency(vcpu, base, page_num))
4788 context->cpu_role.base.level, is_efer_nx(context),
5115 role.base.access = ACC_ALL;
5116 role.base.smm = is_smm(vcpu);
5117 role.base.guest_mode = is_guest_mode(vcpu);
5121 role.base.direct = 1;
5125 role.base.efer_nx = ____is_efer_nx(regs);
5126 role.base.cr0_wp = ____is_cr0_wp(regs);
5127 role.base.smep_andnot_wp = ____is_cr4_smep(regs) && !____is_cr0_wp(regs);
5128 role.base.smap_andnot_wp = ____is_cr4_smap(regs) && !____is_cr0_wp(regs);
5129 role.base.has_4_byte_gpte = !____is_cr4_pae(regs);
5132 role.base.level = ____is_cr4_la57(regs) ? PT64_ROOT_5LEVEL
5135 role.base.level = PT32E_ROOT_LEVEL;
5137 role.base.level = PT32_ROOT_LEVEL;
5161 mmu->cpu_role.base.cr0_wp = cr0_wp;
5187 role.smm = cpu_role.base.smm;
5188 role.guest_mode = cpu_role.base.guest_mode;
5254 root_role = cpu_role.base;
5286 WARN_ON_ONCE(cpu_role.base.direct);
5288 root_role = cpu_role.base;
5291 cpu_role.base.level == PT64_ROOT_4LEVEL)
5307 * support the "entry to SMM" control either. role.base.smm is always 0.
5310 role.base.level = level;
5311 role.base.has_4_byte_gpte = false;
5312 role.base.direct = false;
5313 role.base.ad_disabled = !accessed_dirty;
5314 role.base.guest_mode = true;
5315 role.base.access = ACC_ALL;
5337 context->root_role.word = new_mode.base.word;