Lines Matching defs:enabled
236 * Bail if a vCPU was added and/or enabled its APIC between allocating
261 * userspace has not enabled 32-bit x2APIC IDs. Each APIC is supposed
324 * To optimize logical mode delivery, all software-enabled APICs must
488 bool enabled = val & APIC_SPIV_APIC_ENABLED;
492 if (enabled != apic->sw_enabled) {
493 apic->sw_enabled = enabled;
494 if (enabled)
503 if (enabled) {
712 * true with virtual interrupt delivery enabled.
750 * With APIC virtualization enabled, all caching is disabled
774 * is always -1, with APIC virtualization enabled.
793 * We do get here for APIC virtualization enabled if the guest
925 * this makes sure pv eoi is only enabled when we know it's safe.
1249 * - Else if vector hashing is enabled and it is a lowest-priority
1375 * before NMI watchdog was enabled. Already handled by
1804 * always for VMX enabled hardware.
2203 /* Possibly the TSC deadline timer is not enabled yet */
2384 * Self-IPI exists only when x2APIC is enabled. Bits 7:0 hold
2452 * ICR is a single 64-bit register when x2APIC is enabled, all others
2649 * Clear "enabled" after the memslot is deleted so that a
2691 /* The xAPIC ID is set at RESET even if the APIC was already enabled. */
2904 * We get here even with APIC virtualization enabled, if doing
3060 * -> host enabled PV EOI, guest did not execute EOI yet.
3062 * -> host enabled PV EOI, guest executed EOI.