Lines Matching defs:and
5 * Generic x86 (32-bit and 64-bit) instruction decoder and emulator.
13 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
77 * references and instruction fetches will never occur in special memory
262 * These EFLAGS bits are restored from saved value during emulation, and
288 * and 1 for the straight line speculation INT3, leaves 7 bytes for the
396 /* 2 operand, src and dest are reversed */
661 * aligned, explicitly unaligned, and the rest, which change behaviour
665 * subject to the same check. FXSAVE and FXRSTOR are checked here too as their
901 * We do not know exactly how many bytes will be needed, and
920 * and one has been loaded at the beginning of
970 * Given the 'reg' portion of a ModRM byte, and a register block, return a
1008 FASTOP2(and);
1591 /* NULL selector is not valid for TR, CS and (except for long mode) SS */
1645 * Mode exceptions and IRET (handled above). In all other
1707 * and ((RPL > DPL) or (CPL > DPL)))
1762 * None of MOV, POP and LSS can load a NULL selector in CPL=3, but
1769 * and only forbid it here.
2643 * Intel CPUs mask the counter and pointers in quite strange
2779 /* CR3 and ldt selector are not saved intentionally */
2834 * If we're switching between Protected Mode and VM86, we need to make
2895 /* Only GP registers and segment selectors are saved */
3279 * Both casting ->valptr and ->val to u16 breaks strict aliasing
3311 * CR0 write might have updated CR0.PE and/or CR0.PG
3714 * Hardware doesn't save and restore XMM 0-7 without CR4.OSFXSR, but does save
3715 * and restore MXCSR.
3733 * FXSAVE and FXRSTOR have 4 different formats depending on execution mode,
3736 * - like (1), but FIP and FDP (foo) are only 16 bit. At least Intel CPUs
3737 * preserve whole 32 bit values, though, so (1) and (2) are the same wrt.
3738 * save and restore
3740 * - like (2), but XMM 8-15 are being saved and restored
3742 * - like (3), but FIP and FDP are 64 bit
3744 * Emulation uses (3) for (1) and (2) and preserves XMM 8-15 to reach the
3747 * Note: Guest and host CPUID.(EAX=07H,ECX=0H):EBX[bit 13] (deprecate FPU CS
3748 * and FPU DS) should match.
4981 * These are copied unconditionally here, and checked unconditionally
5013 /* ModRM and SIB bytes. */
5031 * Decode and fetch the source operand: register, memory
5039 * Decode and fetch the second source operand: register, memory
5046 /* Decode and fetch the destination operand: register or memory. */
5067 * and REPNE. Test if the repeat string operation prefix is
5068 * REPE/REPZ or REPNE/REPNZ and if it's the case it tests the
5070 * - if REPE/REPZ and ZF = 0 then done
5071 * - if REPNE/REPNZ and ZF = 1 then done